Hi Bjorn, Thanks for update, provided list consist of all submitted patches for both the series. Regards, Thippeswamy H > -----Original Message----- > From: Bjorn Helgaas <helgaas@xxxxxxxxxx> > Sent: Monday, October 23, 2023 10:57 PM > To: Havalige, Thippeswamy <thippeswamy.havalige@xxxxxxx> > Cc: linux-pci@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux- > kernel@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; > bhelgaas@xxxxxxxxxx; lpieralisi@xxxxxxxxxx; kw@xxxxxxxxx; > robh@xxxxxxxxxx; krzysztof.kozlowski+dt@xxxxxxxxxx; Simek, Michal > <michal.simek@xxxxxxx>; Gogada, Bharat Kumar > <bharat.kumar.gogada@xxxxxxx> > Subject: Re: [PATCH v5 RESEND 0/4] increase ecam size value to discover 256 > buses during > > On Fri, Oct 20, 2023 at 10:35:46AM +0000, Havalige, Thippeswamy wrote: > > Hi Bjorn, > > > > Can you please provide an update on this patch series. > > As with your Xilinx XDMA Soft IP series, I hope to get this merged for v6.7. > > Would you take a quick look at patchwork here: > https://patchwork.kernel.org/project/linux-pci/list/?submitter=207519 > to make sure that everything you're waiting on is listed there? > > I cleaned out things that appeared to be older versions of the "Increase ECAM > size" and the "Add support for Xilinx XDMA Soft IP" > series, but the subject lines didn't always match exactly, so it's possible I > incorrectly marked something as "superseded". > > Bjorn > > > > -----Original Message----- > > > From: Thippeswamy Havalige <thippeswamy.havalige@xxxxxxx> > > > Sent: Monday, October 16, 2023 10:41 AM > > > To: linux-pci@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux- > > > kernel@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx > > > Cc: bhelgaas@xxxxxxxxxx; lpieralisi@xxxxxxxxxx; kw@xxxxxxxxx; > > > robh@xxxxxxxxxx; krzysztof.kozlowski+dt@xxxxxxxxxx; > > > colnor+dt@xxxxxxxxxx; Havalige, Thippeswamy > > > <thippeswamy.havalige@xxxxxxx>; Simek, Michal > > > <michal.simek@xxxxxxx>; Gogada, Bharat Kumar > > > <bharat.kumar.gogada@xxxxxxx> > > > Subject: [PATCH v5 RESEND 0/4] increase ecam size value to discover > > > 256 buses during > > > > > > Current driver is supports up to 16 buses. The following code fixes > > > to support up to 256 buses. > > > > > > update "NWL_ECAM_VALUE_DEFAULT " to 16 can access up to 256MB > ECAM > > > region to detect 256 buses. > > > > > > Update ecam size to 256MB in device tree binding example. > > > > > > Remove unwanted code. > > > > > > Thippeswamy Havalige (4): > > > PCI: xilinx-nwl: Remove unnecessary code which updates primary, > > > secondary and sub-ordinate bus numbers > > > dt-bindings: PCI: xilinx-nwl: Modify ECAM size in example > > > PCI: xilinx-nwl: Rename ECAM size default macro > > > PCI: xilinx-nwl: Increase ECAM size to accommodate 256 buses > > > > > > .../devicetree/bindings/pci/xlnx,nwl-pcie.yaml | 2 +- > > > drivers/pci/controller/pcie-xilinx-nwl.c | 18 +++--------------- > > > 2 files changed, 4 insertions(+), 16 deletions(-) > > > > > > -- > > > 2.25.1 > > > > > > _______________________________________________ > > linux-arm-kernel mailing list > > linux-arm-kernel@xxxxxxxxxxxxxxxxxxx > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
