On Wed, Jan 18, 2012 at 9:46 AM, Bjorn Helgaas <bhelgaas@xxxxxxxxxx> wrote: >> your patches should be ok, only exception should be considered: some >> default link root bus could access >> out of bus range state with _CRS stating. some kind of transparent >> bridge concept. > > I'm afraid I couldn't make any sense out of the paragraph above. If > we don't have any information about host bridge bus number windows > (for example, for bridges not described in ACPI), I think we'll have > to default to [bus 00-ff]. That's effectively what these patches > already do. We only build the struct pci_host_bridge for ACPI > bridges, so the check I added in pci_add_new_bus() does nothing for > non-ACPI bridges. > > If you're suggesting that we need to add some exception (a > "transparent bridge concept"?), can you clarify or suggest a patch? for example: acpi said one peer root bus should be in [0,20) : the default link. other peer root bus could be [80,a0). chipset will route bus other than [80,a0) all to default link. One transparent bridge 00:1c.0 will have 10:00.0 and 10:01.0 10:01.0 is cardbus bridge, if it states with bus [1e-22). bus 20-22 still can be accessible. Thanks Yinghai -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
