Re: [PATCH 2/2] PCI: Add quirk for known incorrect MPSS

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On Wed, 05 Oct 2011 18:26:19 +0100
Ben Hutchings <bhutchings@xxxxxxxxxxxxxx> wrote:

> On Wed, 2011-10-05 at 10:11 -0700, Jesse Barnes wrote:
> > -----BEGIN PGP SIGNED MESSAGE-----
> > Hash: SHA1
> > 
> > On Wed, 5 Oct 2011 12:08:40 -0500
> > Jon Mason <mason@xxxxxxxx> wrote:
> > 
> > > On Wed, Oct 5, 2011 at 11:28 AM, Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> wrote:
> > > > On Tue, 4 Oct 2011 22:50:50 -0500
> > > > Jon Mason <jdmason@xxxxxxxx> wrote:
> > > >
> > > >> On Tue, Oct 04, 2011 at 08:54:19PM +0100, Ben Hutchings wrote:
> > > >> > Using legacy interrupts and TLPs > 256 bytes on the SFC4000 (all
> > > >> > revisions) may cause interrupt messages to be replayed.  In some
> > > >> > systems this results in a non-recoverable MCE.  Early boards using the
> > > >> > SFC4000 set the maximum payload size supported (MPSS) to 1024 bytes
> > > >> > and we should override that.
> > > >> >
> > > >> > There are probably other devices with similar issues, so give this
> > > >> > quirk a generic name.
> > > >> >
> > > >>
> > > >> Looks good to me.  If my MPS mess hasn't pissed off Linus
> > > >> sufficiently, you might try and get this into 3.1.
> > > >>
> > > >> Acked-by: Jon Mason <mason@xxxxxxxx>
> > > >
> > > > Just to confirm: this only occurs when you switch over to "performance"
> > > > mode and not by default, right?
> > > 
> > > It could hit this in "safe" mode as well.  But since MPS configuration
> > > is disabled by default in 3.1-rc9, it shouldn't be possible to hit
> > > this unless a boot arg is passed.
> > 
> > Ok good, I'll queue it up for -next then (which shouldn't be too far
> > away now).
> 
> I think I should re-spin these to name both vendor and device IDs first.

Ok, I'll queue up the update version when I get it then.

Thanks,
-- 
Jesse Barnes, Intel Open Source Technology Center

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