Re: [PATCH] PCI: Workaround for Intel MPS errata

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On Wed, Oct 5, 2011 at 11:06 AM, Jon Mason <mason@xxxxxxxx> wrote:
>
> On Wed, Oct 5, 2011 at 11:37 AM, Bjorn Helgaas <bhelgaas@xxxxxxxxxx> wrote:

> >> +       pr_info_once("Read completion coalescing disabled due to hardware "
> >> +                    "errata relating to 256B MPS.\n");
> >
> > Can you use dev_info() here so we have the context that (a) this is
> > PCI-related and (b) specifically related to device X?
>
> It would print out 6 times for each system (one for the memory
> controller and one for each root port).  I thought printing it once
> was better, since it is really a system wide setting.

I'm fine with printing it once (you'd have to add your own static
variable and check, obviously, since there's no "dev_info_once"), but
I think the context is important.

> > ...
> >
> > Wow, that's a long list.  Makes me suspect that we'll have to keep
> > adding things to it, but I guess there's no good way to do it
> > generically.
>
> I looked at a number of other Intel MC erratas, and didn't see any MPS
> related issues.  Hopefully this is it for these, though who knows if
> there are similar issues on AMD/nVidia memory memory controllers.
> Guess there is one way to find out. :)
>
> Should I push this for 3.1-rcX or wait for 3.2?

I think at this stage, it's 3.2 material.  At least, that's the way I
read Linus' recent email :)

Bjorn
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