The problems I've had with rescan happen when the device IS detected on the bus, but later has a change of resources - rescan won't reallocate the needed resources. Example #1: An FPGA on the bus that contains a fixed PCIe core, which presents an interface on BAR0 allowing the rest of the FPGA to be programmed. Once programmed, the FPGA now has BAR0, BAR1, and BAR2. Doing a rescan in this case WILL NOT allocate any kernel resources for BAR1 and BAR2. Example #2: A Freescale CPU as a PCIe endpoint. The initial set up as defined by the boot code defines BAR0, which gets scanned by the host processor on PCI enumeration. Later, the PPC finishes booting its code, and reprograms the endpoint, and now BAR1 and BAR2 are defined. Again, doing a rescan on the host CPU does NOT reallocate the resources. And a few months ago, when I asked how to handle this case, I basically was told "you are doing it wrong", with no input on how to do it "right". -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
