RE: Intermediate PCI bridge device(s) are not enabled

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Pedanekar, Hemant wrote on Thursday, October 07, 2010 9:36 AM:

> Pedanekar, Hemant wrote on Tuesday, September 28, 2010 1:41 PM:
> 
>> Hello,
>> 
>> I am working on a PCI Express system based on ARM SoC with following setup:
>> 
>> PCIe Root Complex -> PCIe-PCI Bridge -> PCI SATA Controller
>> 
>> The numbering is:
>> Bus #0 Device #0 = PCIe Root Complex (RC)
>> Bus #1 Device #0 = PCIe-PCI Bridge
>> Bus #2 Device #0 = PCI SATA Controller
>> 
> [...]
>> 
>> Please let me know what I am missing here. Do I need to call
>> pci_assign_unassigned_bridge_resources or
>> pci_assign_unassigned_resources in my
>> scan routine (after pci_scan_bus returns)?
>> 
> 
> [...]
> 
> Hello,
> 
> Calling pci_assign_unassigned_resources() indeed helped. Now
> the bridges are
> Enabled and endpoint drivers work fine.
> 
> But after looking at other code sources, I see that this is
> not a common
> practice. This means I may be missing something and there is
> some other issue
> due to which the bridge devices are not enabled after enumeration.
> 
> Can someone please comment on this?

Any inputs on this?

Thanks
-
Hemant

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