Pedanekar, Hemant wrote on Tuesday, September 28, 2010 1:41 PM: > Hello, > > I am working on a PCI Express system based on ARM SoC with following setup: > > PCIe Root Complex -> PCIe-PCI Bridge -> PCI SATA Controller > > The numbering is: > Bus #0 Device #0 = PCIe Root Complex (RC) > Bus #1 Device #0 = PCIe-PCI Bridge > Bus #2 Device #0 = PCI SATA Controller > > At the end of enumeration, the lspci shows the above devices correctly, but > I observed that the PCIe RC and PCIe-PCI Bridge are not enabled (mem, bus > mastering disabled). Now when I try to load the driver for > SATA controller, it > crashes as the memory access to SATA Controller's BAR window > fails because the > PCIe-PCI bridge is not enabled. I can force enabling the RC > in my PCI controller > code but the intermediate bridge(s) need to be enabled. > > If I do "echo 1 > /sys/bus/pci/rescan" before loading the > SATA driver, the PCIe > RC and Bridge are enabled and loading the SATA driver works fine. > [...] > > Please let me know what I am missing here. Do I need to call > pci_assign_unassigned_bridge_resources or > pci_assign_unassigned_resources in my > scan routine (after pci_scan_bus returns)? > [...] Hello, Calling pci_assign_unassigned_resources() indeed helped. Now the bridges are Enabled and endpoint drivers work fine. But after looking at other code sources, I see that this is not a common practice. This means I may be missing something and there is some other issue due to which the bridge devices are not enabled after enumeration. Can someone please comment on this? Thanks - Hemant -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
