On Tue, Jul 13, 2010 at 04:02:53PM +0530, raghav r wrote:
> hello,
>
> >> Could you share a diff showing the change?
>
> There is only one change done( drivers/pci/probe.c) but anyway the diff:
> ____________________________
> 1077,1080c1077,1078
> < for (pass=0; pass < 1; pass++)
> < list_for_each_entry(dev, &bus->devices, bus_list) {
> ---
> > for (pass=0; pass < 2; pass++)
> > list_for_each_entry(dev, &bus->devices, bus_list) {
> 1085c1083
> ___________________________
> As you can see it will make a single pass, But if it goes for two
> passes, it gives abort ( trying access unmapped memory).
Ok.
>
>
> > All OS's use at least two passes to scan PCI config space:
> > 1) depth-first scan of PCI config space to enumerate PCI busses
> > behind a PCI-PCI bridge and collect per device MMIO/IOPort
> > resource requirements.
> > 2) assign/enable MMIO/IOPort resources that aren't already assigned.
> >
> >
> > Your system looks rather broken to me. It looks like the same
> > devices are responding to multiple PCI configuration space addresses.
> >
> > IIRC, there can be up to 16 devices per "PCI bus" (16 select bits
> > for cfg space) and each device could have 7 "functions" (which
> > also need to be probed if function 0 exist).
> > E.g. a dual port NIC would typically implement a seperate
> > function for each NIC.
>
> I establish the Link between RC and EP before the scan.
> Note that its a single Device with single function, connected to RC.
Ok.
>
> Also what could be reason for RC to scan same device again and again.
> Is it generating same address to scan other devices on the bus..?
Something like that, yes. Either the RC is generating the same address
multiple times or the card is responding to multiple addresses.
Need to get a PCI-E bus trace to see what is really happening.
cheers
grant
>
>
> Thanks,
> Raghav
>
> ----- Original Message -----
> From: "Grant Grundler" <grundler@xxxxxxxxxxxxxxxx>
> To: "raghav r" <rocks.lnx@xxxxxxxxx>
> Cc: <linux-pci@xxxxxxxxxxxxxxx>
> Sent: Sunday, July 11, 2010 9:44 AM
> Subject: Re: Fwd: PCI device scanning failure
>
>
> > On Fri, Jul 09, 2010 at 02:30:13PM +0530, raghav r wrote:
> >> Hello,
> >>
> >> To continue on the previous queries, ( booting ARM platform with RC
> >> connected to a single EP with single function).
> >>
> >> I have modified the number of pass'es in probe.c ( scanning behind the
> >> bridge to be 1) and i get the following debug messages.
> >
> > Could you share a diff showing the change?
> >
> > All OS's use at least two passes to scan PCI config space:
> > 1) depth-first scan of PCI config space to enumerate PCI busses
> > behind a PCI-PCI bridge and collect per device MMIO/IOPort
> > resource requirements.
> > 2) assign/enable MMIO/IOPort resources that aren't already assigned.
> >
> >> I'm a little confused with the messages.
> >>
> >> There should have been a single Device with Header type 1 ( RC ) and a
> >> device with header type 0 ( EP).
> >>
> >> Can someone explain me whats happening with the Device scanning. ( why
> >> scanning for multiple devices )
> >
> > Your system looks rather broken to me. It looks like the same
> > devices are responding to multiple PCI configuration space addresses.
> >
> > IIRC, there can be up to 16 devices per "PCI bus" (16 select bits
> > for cfg space) and each device could have 7 "functions" (which
> > also need to be probed if function 0 exist).
> > E.g. a dual port NIC would typically implement a seperate
> > function for each NIC.
> >
> > hth,
> > grant
> >
> >> PCI: Scanning bus 0000:00
> >> pci 0000:00:00.0: found [144d:a629] class 000480 header type 01
> >> pci 0000:00:00.0: ignoring class 480 (doesn't match header type 01)
> >> pci 0000:00:00.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:00.0: supports D1
> >> pci 0000:00:00.0: PME# supported from D0 D1 D3hot
> >> pci 0000:00:00.0: PME# disabled
> >> pci 0000:00:02.0: found [144d:a629] class 000480 header type 01
> >> pci 0000:00:02.0: ignoring class 480 (doesn't match header type 01)
> >> pci 0000:00:02.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:02.0: supports D1
> >> pci 0000:00:02.0: PME# supported from D0 D1 D3hot
> >> pci 0000:00:02.0: PME# disabled
> >> pci 0000:00:04.0: found [144d:a629] class 000480 header type 01
> >> pci 0000:00:04.0: ignoring class 480 (doesn't match header type 01)
> >> pci 0000:00:04.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:04.0: supports D1
> >> pci 0000:00:04.0: PME# supported from D0 D1 D3hot
> >> pci 0000:00:04.0: PME# disabled
> >> pci 0000:00:06.0: found [144d:a629] class 000480 header type 01
> >> pci 0000:00:06.0: ignoring class 480 (doesn't match header type 01)
> >> pci 0000:00:06.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:06.0: supports D1
> >> pci 0000:00:06.0: PME# supported from D0 D1 D3hot
> >> pci 0000:00:06.0: PME# disabled
> >> pci 0000:00:08.0: found [0003:1c5a] class 000000 header type 00
> >> pci 0000:00:08.0: reg 30 32bit mmio: [0x80000000-0x800007ff]
> >> pci 0000:00:08.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:09.0: found [0003:1c5a] class 000000 header type 00
> >> pci 0000:00:09.0: reg 30 32bit mmio: [0x80000000-0x800007ff]
> >> pci 0000:00:09.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:0a.0: found [0003:1c5a] class 000000 header type 00
> >> pci 0000:00:0a.0: reg 30 32bit mmio: [0x80000000-0x800007ff]
> >> pci 0000:00:0a.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:0b.0: found [0003:1c5a] class 000000 header type 00
> >> pci 0000:00:0b.0: reg 30 32bit mmio: [0x80000000-0x800007ff]
> >> pci 0000:00:0b.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:0c.0: found [0003:1c5a] class 000000 header type 00
> >> pci 0000:00:0c.0: reg 30 32bit mmio: [0x80000000-0x800007ff]
> >> pci 0000:00:0c.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:0d.0: found [0003:1c5a] class 000000 header type 00
> >> pci 0000:00:0d.0: reg 30 32bit mmio: [0x80000000-0x800007ff]
> >> pci 0000:00:0d.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:0e.0: found [0003:1c5a] class 000000 header type 00
> >> pci 0000:00:0e.0: reg 30 32bit mmio: [0x80000000-0x800007ff]
> >> pci 0000:00:0e.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:0f.0: found [0003:1c5a] class 000000 header type 00
> >> pci 0000:00:0f.0: reg 30 32bit mmio: [0x80000000-0x800007ff]
> >> pci 0000:00:0f.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:10.0: found [144d:a629] class 000480 header type 01
> >> pci 0000:00:10.0: ignoring class 480 (doesn't match header type 01)
> >> pci 0000:00:10.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:10.0: supports D1
> >> pci 0000:00:10.0: PME# supported from D0 D1 D3hot
> >> pci 0000:00:10.0: PME# disabled
> >> pci 0000:00:12.0: found [144d:a629] class 000480 header type 01
> >> pci 0000:00:12.0: ignoring class 480 (doesn't match header type 01)
> >> pci 0000:00:12.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:12.0: supports D1
> >> pci 0000:00:12.0: PME# supported from D0 D1 D3hot
> >> pci 0000:00:12.0: PME# disabled
> >> pci 0000:00:14.0: found [144d:a629] class 000480 header type 01
> >> pci 0000:00:14.0: ignoring class 480 (doesn't match header type 01)
> >> pci 0000:00:14.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:14.0: supports D1
> >> pci 0000:00:14.0: PME# supported from D0 D1 D3hot
> >> pci 0000:00:14.0: PME# disabled
> >> pci 0000:00:16.0: found [144d:a629] class 000480 header type 01
> >> pci 0000:00:16.0: ignoring class 480 (doesn't match header type 01)
> >> pci 0000:00:16.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:16.0: supports D1
> >> pci 0000:00:16.0: PME# supported from D0 D1 D3hot
> >> pci 0000:00:16.0: PME# disabled
> >> pci 0000:00:18.0: found [0003:1c5a] class 000000 header type 00
> >> pci 0000:00:18.0: reg 30 32bit mmio: [0x80000000-0x800007ff]
> >> pci 0000:00:18.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:19.0: found [0003:1c5a] class 000000 header type 00
> >> pci 0000:00:19.0: reg 30 32bit mmio: [0x80000000-0x800007ff]
> >> pci 0000:00:19.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:1a.0: found [0003:1c5a] class 000000 header type 00
> >> pci 0000:00:1a.0: reg 30 32bit mmio: [0x80000000-0x800007ff]
> >> pci 0000:00:1a.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:1b.0: found [0003:1c5a] class 000000 header type 00
> >> pci 0000:00:1b.0: reg 30 32bit mmio: [0x80000000-0x800007ff]
> >> pci 0000:00:1b.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:1c.0: found [0003:1c5a] class 000000 header type 00
> >> pci 0000:00:1c.0: reg 30 32bit mmio: [0x80000000-0x800007ff]
> >> pci 0000:00:1c.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:1d.0: found [0003:1c5a] class 000000 header type 00
> >> pci 0000:00:1d.0: reg 30 32bit mmio: [0x80000000-0x800007ff]
> >> pci 0000:00:1d.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:1e.0: found [0003:1c5a] class 000000 header type 00
> >> pci 0000:00:1e.0: reg 30 32bit mmio: [0x80000000-0x800007ff]
> >> pci 0000:00:1e.0: calling pci_fixup_ide_bases+0x0/0x50
> >> pci 0000:00:1f.0: found [0003:1c5a] class 000000 header type 00
> >> pci 0000:00:1f.0: reg 30 32bit mmio: [0x80000000-0x800007ff]
> >> pci 0000:00:1f.0: calling pci_fixup_ide_bases+0x0/0x50
> >> PCI: Fixups for bus 0000:00
> >> PCI: bus0: Fast back to back transfers disabled
> >> pci 0000:00:00.0: scanning behind bridge, config 000000, pass 0
> >> pci 0000:00:00.0: bus configuration invalid, reconfiguring
> >> pci 0000:00:02.0: scanning behind bridge, config 000000, pass 0
> >> pci 0000:00:02.0: bus configuration invalid, reconfiguring
> >> pci 0000:00:04.0: scanning behind bridge, config 000000, pass 0
> >> pci 0000:00:04.0: bus configuration invalid, reconfiguring
> >> pci 0000:00:06.0: scanning behind bridge, config 000000, pass 0
> >> pci 0000:00:06.0: bus configuration invalid, reconfiguring
> >> pci 0000:00:10.0: scanning behind bridge, config 000000, pass 0
> >> pci 0000:00:10.0: bus configuration invalid, reconfiguring
> >> pci 0000:00:12.0: scanning behind bridge, config 000000, pass 0
> >> pci 0000:00:12.0: bus configuration invalid, reconfiguring
> >> pci 0000:00:14.0: scanning behind bridge, config 000000, pass 0
> >> pci 0000:00:14.0: bus configuration invalid, reconfiguring
> >> pci 0000:00:16.0: scanning behind bridge, config 000000, pass 0
> >> pci 0000:00:16.0: bus configuration invalid, reconfiguring
> >> PCI: Bus scan for 0000:00 returning with max=00
> >> PCI map irq: slot 0, pin 1, devslot 0, irq: 32
> >> pci 0000:00:00.0: fixup irq: got 32
> >> PCI map irq: slot 0, pin 1, devslot 2, irq: 32
> >> pci 0000:00:02.0: fixup irq: got 32
> >> PCI map irq: slot 0, pin 1, devslot 4, irq: 32
> >> pci 0000:00:04.0: fixup irq: got 32
> >> PCI map irq: slot 0, pin 1, devslot 6, irq: 32
> >> pci 0000:00:06.0: fixup irq: got 32
> >> pci 0000:00:08.0: fixup irq: got 0
> >> pci 0000:00:09.0: fixup irq: got 0
> >> pci 0000:00:0a.0: fixup irq: got 0
> >> pci 0000:00:0b.0: fixup irq: got 0
> >> pci 0000:00:0c.0: fixup irq: got 0
> >> pci 0000:00:0d.0: fixup irq: got 0
> >> pci 0000:00:0e.0: fixup irq: got 0
> >> pci 0000:00:0f.0: fixup irq: got 0
> >> PCI map irq: slot 0, pin 1, devslot 16, irq: 32
> >> pci 0000:00:10.0: fixup irq: got 32
> >> PCI map irq: slot 0, pin 1, devslot 18, irq: 32
> >> pci 0000:00:12.0: fixup irq: got 32
> >> PCI map irq: slot 0, pin 1, devslot 20, irq: 32
> >> pci 0000:00:14.0: fixup irq: got 32
> >> PCI map irq: slot 0, pin 1, devslot 22, irq: 32
> >> pci 0000:00:16.0: fixup irq: got 32
> >> pci 0000:00:18.0: fixup irq: got 0
> >> pci 0000:00:19.0: fixup irq: got 0
> >> pci 0000:00:1a.0: fixup irq: got 0
> >> pci 0000:00:1b.0: fixup irq: got 0
> >> pci 0000:00:1c.0: fixup irq: got 0
> >> pci 0000:00:1d.0: fixup irq: got 0
> >> pci 0000:00:1e.0: fixup irq: got 0
> >> pci 0000:00:1f.0: fixup irq: got 0
> >>
> >> pci 0000:00:00.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:00.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:02.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:02.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:04.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:04.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:06.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:06.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:08.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:08.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:09.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:09.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:0a.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:0a.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:0b.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:0b.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:0c.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:0c.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:0d.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:0d.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:0e.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:0e.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:0f.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:0f.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:10.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:10.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:12.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:12.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:14.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:14.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:16.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:16.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:18.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:18.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:19.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:19.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:1a.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:1a.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:1b.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:1b.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:1c.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:1c.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:1d.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:1d.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:1e.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:1e.0: calling quirk_usb_early_handoff+0x0/0x468
> >> pci 0000:00:1f.0: calling quirk_cardbus_legacy+0x0/0x38
> >> pci 0000:00:1f.0: calling quirk_usb_early_handoff+0x0/0x468
> >>
> >>
> >> ~raghav
> >>
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