Hello, To continue on the previous queries, ( booting ARM platform with RC connected to a single EP with single function). I have modified the number of pass'es in probe.c ( scanning behind the bridge to be 1) and i get the following debug messages. I'm a little confused with the messages. There should have been a single Device with Header type 1 ( RC ) and a device with header type 0 ( EP). Can someone explain me whats happening with the Device scanning. ( why scanning for multiple devices ) PCI: Scanning bus 0000:00 pci 0000:00:00.0: found [144d:a629] class 000480 header type 01 pci 0000:00:00.0: ignoring class 480 (doesn't match header type 01) pci 0000:00:00.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:00.0: supports D1 pci 0000:00:00.0: PME# supported from D0 D1 D3hot pci 0000:00:00.0: PME# disabled pci 0000:00:02.0: found [144d:a629] class 000480 header type 01 pci 0000:00:02.0: ignoring class 480 (doesn't match header type 01) pci 0000:00:02.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:02.0: supports D1 pci 0000:00:02.0: PME# supported from D0 D1 D3hot pci 0000:00:02.0: PME# disabled pci 0000:00:04.0: found [144d:a629] class 000480 header type 01 pci 0000:00:04.0: ignoring class 480 (doesn't match header type 01) pci 0000:00:04.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:04.0: supports D1 pci 0000:00:04.0: PME# supported from D0 D1 D3hot pci 0000:00:04.0: PME# disabled pci 0000:00:06.0: found [144d:a629] class 000480 header type 01 pci 0000:00:06.0: ignoring class 480 (doesn't match header type 01) pci 0000:00:06.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:06.0: supports D1 pci 0000:00:06.0: PME# supported from D0 D1 D3hot pci 0000:00:06.0: PME# disabled pci 0000:00:08.0: found [0003:1c5a] class 000000 header type 00 pci 0000:00:08.0: reg 30 32bit mmio: [0x80000000-0x800007ff] pci 0000:00:08.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:09.0: found [0003:1c5a] class 000000 header type 00 pci 0000:00:09.0: reg 30 32bit mmio: [0x80000000-0x800007ff] pci 0000:00:09.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:0a.0: found [0003:1c5a] class 000000 header type 00 pci 0000:00:0a.0: reg 30 32bit mmio: [0x80000000-0x800007ff] pci 0000:00:0a.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:0b.0: found [0003:1c5a] class 000000 header type 00 pci 0000:00:0b.0: reg 30 32bit mmio: [0x80000000-0x800007ff] pci 0000:00:0b.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:0c.0: found [0003:1c5a] class 000000 header type 00 pci 0000:00:0c.0: reg 30 32bit mmio: [0x80000000-0x800007ff] pci 0000:00:0c.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:0d.0: found [0003:1c5a] class 000000 header type 00 pci 0000:00:0d.0: reg 30 32bit mmio: [0x80000000-0x800007ff] pci 0000:00:0d.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:0e.0: found [0003:1c5a] class 000000 header type 00 pci 0000:00:0e.0: reg 30 32bit mmio: [0x80000000-0x800007ff] pci 0000:00:0e.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:0f.0: found [0003:1c5a] class 000000 header type 00 pci 0000:00:0f.0: reg 30 32bit mmio: [0x80000000-0x800007ff] pci 0000:00:0f.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:10.0: found [144d:a629] class 000480 header type 01 pci 0000:00:10.0: ignoring class 480 (doesn't match header type 01) pci 0000:00:10.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:10.0: supports D1 pci 0000:00:10.0: PME# supported from D0 D1 D3hot pci 0000:00:10.0: PME# disabled pci 0000:00:12.0: found [144d:a629] class 000480 header type 01 pci 0000:00:12.0: ignoring class 480 (doesn't match header type 01) pci 0000:00:12.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:12.0: supports D1 pci 0000:00:12.0: PME# supported from D0 D1 D3hot pci 0000:00:12.0: PME# disabled pci 0000:00:14.0: found [144d:a629] class 000480 header type 01 pci 0000:00:14.0: ignoring class 480 (doesn't match header type 01) pci 0000:00:14.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:14.0: supports D1 pci 0000:00:14.0: PME# supported from D0 D1 D3hot pci 0000:00:14.0: PME# disabled pci 0000:00:16.0: found [144d:a629] class 000480 header type 01 pci 0000:00:16.0: ignoring class 480 (doesn't match header type 01) pci 0000:00:16.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:16.0: supports D1 pci 0000:00:16.0: PME# supported from D0 D1 D3hot pci 0000:00:16.0: PME# disabled pci 0000:00:18.0: found [0003:1c5a] class 000000 header type 00 pci 0000:00:18.0: reg 30 32bit mmio: [0x80000000-0x800007ff] pci 0000:00:18.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:19.0: found [0003:1c5a] class 000000 header type 00 pci 0000:00:19.0: reg 30 32bit mmio: [0x80000000-0x800007ff] pci 0000:00:19.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:1a.0: found [0003:1c5a] class 000000 header type 00 pci 0000:00:1a.0: reg 30 32bit mmio: [0x80000000-0x800007ff] pci 0000:00:1a.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:1b.0: found [0003:1c5a] class 000000 header type 00 pci 0000:00:1b.0: reg 30 32bit mmio: [0x80000000-0x800007ff] pci 0000:00:1b.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:1c.0: found [0003:1c5a] class 000000 header type 00 pci 0000:00:1c.0: reg 30 32bit mmio: [0x80000000-0x800007ff] pci 0000:00:1c.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:1d.0: found [0003:1c5a] class 000000 header type 00 pci 0000:00:1d.0: reg 30 32bit mmio: [0x80000000-0x800007ff] pci 0000:00:1d.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:1e.0: found [0003:1c5a] class 000000 header type 00 pci 0000:00:1e.0: reg 30 32bit mmio: [0x80000000-0x800007ff] pci 0000:00:1e.0: calling pci_fixup_ide_bases+0x0/0x50 pci 0000:00:1f.0: found [0003:1c5a] class 000000 header type 00 pci 0000:00:1f.0: reg 30 32bit mmio: [0x80000000-0x800007ff] pci 0000:00:1f.0: calling pci_fixup_ide_bases+0x0/0x50 PCI: Fixups for bus 0000:00 PCI: bus0: Fast back to back transfers disabled pci 0000:00:00.0: scanning behind bridge, config 000000, pass 0 pci 0000:00:00.0: bus configuration invalid, reconfiguring pci 0000:00:02.0: scanning behind bridge, config 000000, pass 0 pci 0000:00:02.0: bus configuration invalid, reconfiguring pci 0000:00:04.0: scanning behind bridge, config 000000, pass 0 pci 0000:00:04.0: bus configuration invalid, reconfiguring pci 0000:00:06.0: scanning behind bridge, config 000000, pass 0 pci 0000:00:06.0: bus configuration invalid, reconfiguring pci 0000:00:10.0: scanning behind bridge, config 000000, pass 0 pci 0000:00:10.0: bus configuration invalid, reconfiguring pci 0000:00:12.0: scanning behind bridge, config 000000, pass 0 pci 0000:00:12.0: bus configuration invalid, reconfiguring pci 0000:00:14.0: scanning behind bridge, config 000000, pass 0 pci 0000:00:14.0: bus configuration invalid, reconfiguring pci 0000:00:16.0: scanning behind bridge, config 000000, pass 0 pci 0000:00:16.0: bus configuration invalid, reconfiguring PCI: Bus scan for 0000:00 returning with max=00 PCI map irq: slot 0, pin 1, devslot 0, irq: 32 pci 0000:00:00.0: fixup irq: got 32 PCI map irq: slot 0, pin 1, devslot 2, irq: 32 pci 0000:00:02.0: fixup irq: got 32 PCI map irq: slot 0, pin 1, devslot 4, irq: 32 pci 0000:00:04.0: fixup irq: got 32 PCI map irq: slot 0, pin 1, devslot 6, irq: 32 pci 0000:00:06.0: fixup irq: got 32 pci 0000:00:08.0: fixup irq: got 0 pci 0000:00:09.0: fixup irq: got 0 pci 0000:00:0a.0: fixup irq: got 0 pci 0000:00:0b.0: fixup irq: got 0 pci 0000:00:0c.0: fixup irq: got 0 pci 0000:00:0d.0: fixup irq: got 0 pci 0000:00:0e.0: fixup irq: got 0 pci 0000:00:0f.0: fixup irq: got 0 PCI map irq: slot 0, pin 1, devslot 16, irq: 32 pci 0000:00:10.0: fixup irq: got 32 PCI map irq: slot 0, pin 1, devslot 18, irq: 32 pci 0000:00:12.0: fixup irq: got 32 PCI map irq: slot 0, pin 1, devslot 20, irq: 32 pci 0000:00:14.0: fixup irq: got 32 PCI map irq: slot 0, pin 1, devslot 22, irq: 32 pci 0000:00:16.0: fixup irq: got 32 pci 0000:00:18.0: fixup irq: got 0 pci 0000:00:19.0: fixup irq: got 0 pci 0000:00:1a.0: fixup irq: got 0 pci 0000:00:1b.0: fixup irq: got 0 pci 0000:00:1c.0: fixup irq: got 0 pci 0000:00:1d.0: fixup irq: got 0 pci 0000:00:1e.0: fixup irq: got 0 pci 0000:00:1f.0: fixup irq: got 0 pci 0000:00:00.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:00.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:02.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:02.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:04.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:04.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:06.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:06.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:08.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:08.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:09.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:09.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:0a.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:0a.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:0b.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:0b.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:0c.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:0c.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:0d.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:0d.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:0e.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:0e.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:0f.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:0f.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:10.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:10.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:12.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:12.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:14.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:14.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:16.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:16.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:18.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:18.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:19.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:19.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:1a.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:1a.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:1b.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:1b.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:1c.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:1c.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:1d.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:1d.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:1e.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:1e.0: calling quirk_usb_early_handoff+0x0/0x468 pci 0000:00:1f.0: calling quirk_cardbus_legacy+0x0/0x38 pci 0000:00:1f.0: calling quirk_usb_early_handoff+0x0/0x468 ~raghav ---------- Forwarded message ---------- From: raghav r <rocks.lnx@xxxxxxxxx> Date: Wed, Jul 7, 2010 at 1:16 PM Subject: PCI device scanning failure To: linux-pci@xxxxxxxxxxxxxxx Hello, I have a device connected to the Rootcomplex.( RC ). This is the only a single function End Point device attached. while booting, Subsystem is trying to scan my Rootcomplex for possible attached devices,in the function " pci_scan_child_bus " , its trying to scan the devices beyond the RC bridge ( pci_scan_bridge ). Here its going in a recursive loop and trying to acccess memory ( in read_config method ) beyond the mapped range, resulting in abort. Also while scanning its updating bus numbers ( different primary, secondary and sub ) in the RC config registers itself. I'm mapping enough memory to be used for PCI. my questions, 1. how much memory should i allocate ( is it required to allocated enough memory to scan whole device limit range) 2. For how many buses/devices pci_scan_child_bus is recursive Thanks, Raghav -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
