On Tue, Dec 29, 2009 at 8:47 AM, Helge Deller <deller@xxxxxx> wrote: >> 2) Change return space register to sr7. sr3 is not set correctly >> if the entry number is invalid. > > Yep. > >> Have nasty suspicion that sr3 is getting hit... Is the thought here that we take an interrupt, and sr3 is not guaranteed saved/restored, while sr7 is guaranteed? I don't see anything wrong with moving the gate earlier (unless someone can come up with a case where an LWS may not want to gate). It has the benefit of making the fast path 1 instruction shorter, however I don't see that it makes the implementation more correct. Cheers, Carlos. -- To unsubscribe from this list: send the line "unsubscribe linux-parisc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
