On Tue, Jul 30, 2013 at 12:32:06PM +0100, Paul Walmsley wrote: > > Commit 621a0147d5c921f4cc33636ccd0602ad5d7cbfbc ("ARM: 7757/1: mm: > don't flush icache in switch_mm with hardware broadcasting") breaks > the boot on OMAP2430SDP with omap2plus_defconfig. Tracked to an > undefined instruction abort from the CP15 read in > cache_ops_need_broadcast(). It turns out that gcc 4.5 reorders the > extended CP15 read above the is_smp() test. This breaks ARM1136 r0 > cores, since they don't support several CP15 registers that later ARM > cores do. ARM1136JF-S TRM section 3.2.1 "Register allocation" has the > details. > > So mark the extended CP15 read as clobbering memory, which prevents > the compiler from reordering it before the is_smp() test. Russell > states that the code generated from this approach is preferable to > marking the inline asm as volatile. Remove the existing condition > code clobber as it's obsolete, per Nico's post: > > http://www.spinics.net/lists/arm-kernel/msg261208.html > > This patch is a collaboration with Will Deacon and Russell King. > > Signed-off-by: Paul Walmsley <paul@xxxxxxxxx> > Cc: Will Deacon <will.deacon@xxxxxxx> > Cc: Russell King <rmk+kernel@xxxxxxxxxxxxxxxx> > Cc: Nicolas Pitre <nicolas.pitre@xxxxxxxxxx> > Cc: Tony Lindgren <tony@xxxxxxxxxxx> > --- Acked-by: Will Deacon <will.deacon@xxxxxxx> Will -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html