On Wednesday 09 May 2012 09:18 PM, Russell King - ARM Linux wrote: > On Wed, May 09, 2012 at 06:00:10PM +0530, Shilimkar, Santosh wrote: >> On Wed, May 9, 2012 at 5:53 PM, Russell King - ARM Linux >> <linux@xxxxxxxxxxxxxxxx> wrote: >>> On Wed, May 09, 2012 at 02:20:28PM +0530, Shilimkar, Santosh wrote: >>>> The only change done common code is clearing 'XN' bit for DRAM >>>> region in page table entries. The other change of setting the DACR >>>> register is done in ARMv7 specific code. >>> >>> Yes, XN is an ARMv6+ thing. Before ARMv5, it was implementation defined. >>> >>> Some implementations used the bit to mean "allow writes to update the >>> cache". Other implementations labelled this bit as "should be zero" >>> while others labelled it as "should be one". >>> >> Good to know. >> >>> The upshot of this is, we know that having this bit as '1' means that >>> all the CPUs we support today work. I would be _very_ concerned to >>> change this bit to zero as we _really_ don't know how the pre-ARMv6 >>> CPUs would react. >>> >> I agree. >> >>> The solution to this is pretty simple - if ARMv6+ needs a different >>> base section mapping value, then we need to extract that from the code >>> and pass in the base section mapping value. >>> >>> I'll sort out a patch later today for this. >> Great. > > This works for my 4430SDP board. I haven't booted it on anything else yet. > Please can you check that this solves the issue for you? Thanks. > Yes it does. Are you planning to merge below patch as is or split the patch like 1) Refactoring 2) ARMv7 fix Either is fine with me. Acked-by: Santosh Shilimkar <santosh.shilimkar@xxxxxx> Regards Santosh -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
