jean.pihet@xxxxxxxxxxxxxx writes: > From: Jean Pihet <j-pihet@xxxxxx> > > The MPU latency figures for cpuidle include the MPU itself and also > the peripherals needed for the MPU to execute instructions (e.g. > main memory, caches, IRQ controller, MMU etc). On OMAP3 those > peripherals belong to the MPU and CORE power domains and so the > cpuidle C-states are a combination of MPU and CORE states. > > This patch implements the relation between the cpuidle and per- > device PM QoS frameworks in the OMAP3 specific idle callbacks. > > The chosen C-state shall satisfy the following conditions: > . the 'valid' field is enabled, > . it satisfies the enable_off_mode flag, > . the next state for MPU and CORE power domains is not lower than the > next state calculated by the per-device PM QoS. > > Tested on OMAP3 Beagleboard in RET/OFF using wake-up latency constraints > on MPU, CORE and PER. > > Signed-off-by: Jean Pihet <j-pihet@xxxxxx> nit: this patch mixes functional changes and non-functional changes (whitespace cleanups, alignments etc.) For ease of review, it's best to do non-functional cleanups as a separate patch. Kevin -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
