Benoit, Kevin,
[snip]
...
> >
> > > The point is that this fix is not really acceptable for my point of
> > view:-
> > > (
> > > You really have to check what is going on in the hwmod _enable_wakeup
> > > function.
> > Yes, I understand. Let's check if this problem goes away in Kevin's
> > setup.
> I am seeing the problem with Kevin's setup as well.
If I remove SYSC_HAS_AUTOIDLE flag the problem goes away.
BTW, I have traced _enable_wakeup() and is working fine.
--
Tarun
> > >
> > > >
> > > > I am not sure if there is already a patch to fix this problem. Until
> > the
> > > > reason is found we need this patch to boot on the above platforms.
> > > >
> > > > Signed-off-by: Tarun Kanti DebBarma<tarun.kanti@xxxxxx>
> > > > ---
> > > > arch/arm/plat-omap/dmtimer.c | 13 +++++++++++++
> > > > 1 files changed, 13 insertions(+), 0 deletions(-)
> > > >
> > > > diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-
> > omap/dmtimer.c
> > > > index f4aa4a1..007b754 100644
> > > > --- a/arch/arm/plat-omap/dmtimer.c
> > > > +++ b/arch/arm/plat-omap/dmtimer.c
> > > > @@ -227,6 +227,7 @@ static void omap_dm_timer_write_reg(struct
> > > omap_dm_timer *timer, u32 reg,
> > > >
> > > > static void omap_dm_timer_prepare(struct omap_dm_timer *timer)
> > > > {
> > > > + u32 l;
> > > > struct dmtimer_platform_data *pdata = timer->pdev-
> > >dev.platform_data;
> > > >
> > > > if (!pdata->is_omap16xx) {
> > > > @@ -243,6 +244,18 @@ static void omap_dm_timer_prepare(struct
> > > omap_dm_timer *timer)
> > > > if (pdata->dm_timer_reset)
> > > > pdata->dm_timer_reset(timer);
> > > >
> > > > + /*
> > > > + * Enable wake-up on OMAP2420, OMAP2430 CPUs.
> > > > + * FIXME: SYSC_HAS_ENAWAKEUP flag is already set in hwmod
> > database.
> > > > + * But the setting does not seem to work. Need to investigate
> > why
> > > > + * this is happening.
> > > > + */
> > > > + if (cpu_is_omap2430() || cpu_is_omap2420()) {
> > > > + l = omap_dm_timer_read_reg(timer, OMAP_TIMER_OCP_CFG_REG);
> > > > + l |= 1<< 2;
> > > > + omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l);
> > > > + }
> > > > +
> > > > omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
> > > >
> > > > /* Match hardware reset default of posted mode */
> >
> > --
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