Re: How to change freq of mmc2_clk to 48Mhz for OMAP35xx

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Hello Elvis

On Fri, 10 Dec 2010, Elvis Dowson wrote:

> On Dec 9, 2010, at 12:43 AM, Andy Shevchenko wrote:
> 
> > On Wed, Dec 8, 2010 at 10:36 PM, Paul Walmsley <paul@xxxxxxxxx> wrote:
> >> Anyway, if you want to try changing it from the kernel side, you'll need
> >> code like this in the MMC driver or OMAP integration code (off the top of
> >> my head, untested):
> > 
> >> Please let me know if this doesn't work.

First let me say, my earlier code that I sent you is not going to work.  
This is because hsmmc2_fclk is not directly rate-controllable.  So using 
the kernel clock framework to tweak that won't work.

However...

> In my u-boot-2010.03 board file (or with u-boot-2009.11 patched to incorporate the mmc_set_dev() method)
> 
> I added the following lines of code.
> 
> - mmc_set_dev(2) select the MMC2 controller.
> 
> - mmc_clock_config attempts to use a clock divider value of 2, and this method implements the logic 
> outlined in Section 22.5.2.7.2 of the OMAP35x TRM Rev D 

...

> This is having no effect, and the output clock from the bootloader stage is still at 96MHz. 
> 
> How can I change the MMC CLK output to 48MHz using either the boot loader or the kernel?

Let's focus on the kernel.  What kernel are you running?  If you're not 
running a mainline kernel, I probably can't help you.  For example, if 
you're using a TI kernel or Google kernel, you should talk to/E-mail them 
for support, unless someone else on this list happens to be able to help 
you.  Also, please tell us which board are you using.

For the moment I will assume you are using a recent mainline kernel. 
drivers/mmc/host/omap_hsmmc.c is the applicable driver file.  Please take 
a look at omap_hsmmc_set_ios() and omap_hsmmc_context_restore() in that 
file.  There is some code there that attempts to program the internal MMC 
divisor appropriately.  If you add some debugging printk()s in there, you 
might get some insight into what it's writing to that register.  Could you 
do this and tell us what the code is writing to the SYSCTL register?


- Paul
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