Hi Paul, On Dec 9, 2010, at 12:36 AM, Paul Walmsley wrote: > On Wed, 8 Dec 2010, Elvis Dowson wrote: > >> What should I do to change the output frequency of mmc2_clk >> signal to 48Mhz for the OMAP35xx processor? >> >> Right now it is giving an output of 96MHz and the signal output looks >> more like a sine wave than a square wave clock output signal. > > Assuming you're using the mainline kernel, it doesn't look like the MMC > driver changes its functional clock at all. So perhaps your bootloader is > programming it incorrectly? Section 22.5.2.7.2 of the OMAP35x TRM revision D (page 3128) shows the steps required for changing the MMC/SD/SDIO controller clock frequency. Essentially the steps involve : - disabling clock to the device, - set the new clock divider value, - check it clock is stable, and then - re-enable the clock to the device. All this is being operated on the MMCi.MMCHS_SYSCTL register. I'm using the following bootloader synchronized with the OMAP35x PSP 03.00.01.06 $ git clone git://arago-project.org/git/projects/u-boot-omap3.git u-boot-2009.11-patchwork $ cd u-boot-2009.11-patchwork $ git checkout --track -b OMAPPSP_03.00.01.06 origin/OMAPPSP_03.00.01.06 Doing a grep for "MMCHS_SYSCTL" didn't return anything. Where in the bootloader do you think it can be set? Elvis Dowson -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
