"Nayak, Rajendra" <rnayak@xxxxxx> writes:
[...]
>> > Btw, the WARN's come only for UART3 and the error at hwmod init shows that
>> > maybe _wait_target_ready fails.
>> >
>> > [ 0.000000] NR_IRQS:402
>> > [ 0.000000] Clocking rate (Crystal/DPLL/MPU): 13.0/660/330 MHz
>> > [ 0.000000] omap_hwmod: uart3: cannot be enabled (3)
>> >
>>
>> UART3 on 24xx is in CM_IDLEST2_CORE, and the 2430 hwmod data has it in
>> CM_IDLEST1_CORE.
>>
>> Can you test the change below? I don't have a 2430, and it appears that
>> this is already correct in the 2420 hwmod data.
>>
>> Kevin
>>
>>
>> diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
>> index 92f4ec0..5b61f7c 100644
>> --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
>> +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
>> @@ -449,9 +449,9 @@ static struct omap_hwmod omap2430_uart3_hwmod = {
>> .prcm = {
>> .omap2 = {
>> .module_offs = CORE_MOD,
>> - .prcm_reg_id = 1,
>> + .prcm_reg_id = 2,
>> .module_bit = OMAP24XX_EN_UART3_SHIFT,
>> - .idlest_reg_id = 1,
>> + .idlest_reg_id = 2,
>> .idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT,
>> },
>> },
>
> This does seem to fix the issue on 2430. I don't see the error at hwmod init
> or the WARN's later.
Thanks for testing Rajendra,
I'll fold this into the UART hwmod data for OMAP2 since that was
originally done by me, not Govindraj.
Kevin
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