Kevin, > -----Original Message----- > From: Kevin Hilman [mailto:khilman@xxxxxxxxxxxxxxxxxxx] > Sent: Tuesday, May 18, 2010 10:07 PM > To: Sripathy, Vishwanath > Cc: Gulati, Shweta; linux-omap@xxxxxxxxxxxxxxx > Subject: Re: [PATCH V2] OMAP3: PM: Workaround for DPLL3 Lock issue > > "Sripathy, Vishwanath" <vishwanath.bs@xxxxxx> writes: > > >> All that being said, why is the voltage level being programmed here? > >> > >> It seems to me that all of this errata handling should be > >> self-contained in the voltage layer. > > > > I am not sure if entire errata can be contained in voltage > > layer. This is because we are performing DVFS operation in CPU Idle > > path which involves both Frequency and Voltage scaling. So currently > > this has been done in resource34xx.c where DVFS is implemented. > > What I mean is that there seems to be no good reason to be calling > these from pm34xx.c, they should be called where voltage scaling is > done. Sorry I still do not understand how errata can be invoked from Voltage scaling. Pls note that errata has to be applied only when Core is entering retention or off which can be detected only in omap_sram_idle function. Errata is tightly coupled with CPU idle path. Vishwa > > Kevin -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
