Mika Westerberg <ext-mika.1.westerberg@xxxxxxxxx> writes:
> On Tue, May 04, 2010 at 10:40:06AM +0300, Mika Westerberg wrote:
>> On Mon, May 03, 2010 at 06:58:18PM +0200, ext Tony Lindgren wrote:
>> > * Mika Westerberg <ext-mika.1.westerberg@xxxxxxxxx> [100503 05:52]:
>> (...)
>> > > +/**
>> > > + * omap_dma_reset() - perform software reset for the DMA controller
>> > > + */
>> > > +static void omap_dma_reset(void)
>> > > +{
>> > > + u32 v;
>> > > +
>> > > + if (cpu_class_is_omap1())
>> > > + return;
>> > > +
>> > > + v = dma_read(OCP_SYSCONFIG);
>> > > + v |= 0x2; /* software reset */
>> > > + dma_write(v, OCP_SYSCONFIG);
>> > > +
>> > > + /* wait until reset is complete */
>> > > + while ((dma_read(SYSSTATUS) & 0x1) == 0)
>> > > + cpu_relax();
>> >
>> > This reset part seems to be mach-omap2 specific.
>> >
>> > > + /* disable per channel interrupts */
>> > > + dma_write(0, IRQENABLE_L0);
>> > > + dma_write(0, IRQENABLE_L1);
>> > > + dma_write(0, IRQENABLE_L2);
>> > > + dma_write(0, IRQENABLE_L3);
>> > > +}
>> >
>> > For a minimal fix, how about just disable the interrupt in omap_clear_dma()?
>> > We are already calling that from omap_init_dma().
>>
>> If we do it in omap_clear_dma() then omap_dma_global_context_restore() will
>> return with interrupts masked which probably breaks things.
>>
>> How about something like following patch?
>
> Tony, Kevin
>
> Any comments on this patch?
Looks good to me.
Acked-by: Kevin Hilman <khilman@xxxxxxxxxxxxxxxxxxx>
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