Kovacs Peter Tamas wrote: > > Dear Anand, > > thank you very much for your exhaustive answer and help. Unfortunately > it seems there is no clock signal coming out of the HSUSB1_CLK line. > > >> We are trying to make the HSUSB1 port on the OMAP3430 work as an USB host. > >> To do that, an ISP1507A ULPI HighSpeed USB transceiver is connected to > >> the HSUSB1pins (HSUSB1_STP, CLK, D-0..D7, DIR, NXT). > >> > >> I have all these USB related kernel config options enabled: > >> USB_EHCI_HCD > >> USB_OHCI_HCD > >> USB_MUSB_HDRC > >> TWL4030_USB > >> > >> My guess was that either EHCI or the Inventra should be the one enabling > >> that USB port on the OMAP, but no luck. > >> The external USB port on the MDK works fine with this configuration. > >> > >> The pin multiplexing configuration in the board file omap3430-labrador.c > >> in u-boot also seems to be correct (although the config of USB1_STP > >> seems to be strange, but changing that didn't work either). > >> > > > > HSUSB1 is not supposed to be used with the labrador (do you have a link > > to the board schematics with the mods?). HSUSB1 is the EHCI port. > > > What do you mean not supposed to be used? HSUSB0 goes to the TWL4030 and > then out of the casing. HSUSB2 goes to the ISP1702, but the pins are not > wired out on the Logic MDK baseboard so we cannot use that. Thus only > one possibility remains if we need an extra USB port inside the casing, > which is HSUSB1. I meant there was nothing connected to it on the default board. The pads are possibly brought out to the expansion connector, but I haven't checked the schematic - so I'm not sure. I don't think anyone's tried hooking up a transceiver to that port. > > Not sure why the pad conf is done in u-boot for this board, but maybe > > it was a copy-paste thing. That being said, if you've got the part > > installed correctly, it ought to work. > > > Yes, I can also see these pin multiplexing configs in arch/arm/mach-omap2/usb-ehci.c. > I have defined CONFIG_OMAP_EHCI_PHY_MODE there to make sure they are PHY > (couldn't find it in menuconfig, but this macro seems to be used in this single file). > Still, the clock goes high when powering the board on, and it remains > there forever. > > I recall seeing a TI-specific kernel source in another git repository, > which had menuconfig options for setting PHY/TLL, maybe the USB code is > different too? > > >> Note, the ISP1507A is connected to the following pins of the BGA: > >> HSUSB1_STP (AF10) > >> HSUSB1_CLK (AE10) > >> HSUSB1_DIR (AF9) > >> HSUSB1_NXP (AG9) > >> HSUSB1_D0 (AF11) > >> HSUSB1_D1 (AG12) > >> HSUSB1_D2 (AH12) > >> HSUSB1_D3 (AH14) > >> HSUSB1_D4 (AE11) > >> HSUSB1_D5 (AH9) > >> HSUSB1_D6 (AF13) > >> HSUSB1_D7 (AE13) > >> > > > > These are the pads for EHCI. So I suppose that's what you're trying to use. > > > We suspect there might be a confusion here. > According to the Logic 3430 SOM board schematic, HSUSB1_CLK is AE10 (and > also ETK_CLK, MMC3_CMD, GPIO_13). > According to the OMAP3430 Multimedia Processor Data Manual version N > (OMAP3430_ES1.0_POP_DM_V_N.pdf), the AE10 pin can be ETK_CLK, HW_DBG1, Not sure about this - if it says ES1.0, that's a really old silicon version. The HSUSB block was not present in that chip and there are very very few of these chips floating around. ES2.0 and greater all have this block and all boards in the wild (including the labrador) should have an ES2 or greater chip. > GPIO_13 and SYS_NDMAREQ1, so it mentions HW_DBG1 as Mode3 instead of USB. > Then, in mach_omap2/usb-ehci.c, I can see > omap_cfg_reg(Y8_3430_USB1HS_PHY_CLK); Does this mean that Y8 is > configured as USB? According to the Logic schematic pin Y8 is UART1_RX > or GPIO_151, but not USB at all. No, this is incorrect. Go with the setting in mach-omap2/mux.c. All packages have the same pads for HSUSB1 lines, so there should be no issue with this. > > So far we have used the pins as seen in the Logic schematic for creating > an extension board with a number of SPI and GPIO signals, and everything > worked perfectly. Why are the pins described differently? > > > Note that EHCI on the OMAP3 supports only the input clocking mode. This > > might mean you need to check if you've configured the PHY correctly for > > this mode. (No XTAL required, OMAP provides the clock to the PHY). > > NXP seems to have removed all mention of this mode from their > > data sheets, so you might want to check with them. > > > Thanks, this is our fault. The clock pin of the ISP1507 is output only, > so it seems not to be compatible with the OMAP3430. > The clock pin of the ISP1504 can be configured for I/O, however this > component is quite difficult to get, but it seems it's necessary. You might want to take a look at the NXP ISP1703. I believe it's available now and does officially support the input-clocking mode. (Disclaimer: I haven't personally used with my OMAP3 SDP , but I was informed that it works) Beagleboard and others use the SMSC 332x, but we have issues with suspend-resume with this PHY. If you're designing fresh, you might want to try the NXP PHY. > > Also, do you see a 60MHz clock when you probe the HSUSB1_CLK line? > > > Unfortunately not. There is a constant high in the CLK line during the > whole poweron and boot process, no matter if I configure the USB to PHY > or TLL. We've also tried another Logic OMAP MDK unit and the effect is > the same. > > Could you please suggest what can be the cause of no clock signal (and > other ULPI signals) appearing at all? Depends. DPLL5 not locked maybe? Current linux-omap code should have this sorted out (other boards work great). On current linux-omap, all you should need to do is add an entry in the board file (attached patch should do it, compile tested only), and enable EHCI in the menuconfig. Now when you load the ehci module, you should be able to see the 60MHz clock on HSUSB1_CLK. Note that the clock won't be enabled until the ehci driver enables the usb 120 MHz f-clock (which is divided to give out the ULPI clock). - Anand
Attachment:
ldp-enable-ehci.patch
Description: ldp-enable-ehci.patch
