RE: [PATCH] OMAP3: DVFS: No sdrc AC timing changes during core dvfs

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Hi Richard,

>From: linux-omap-owner@xxxxxxxxxxxxxxx [mailto:linux-omap-
>owner@xxxxxxxxxxxxxxx] On Behalf Of Woodruff, Richard
>
>> From: linux-omap-owner@xxxxxxxxxxxxxxx [mailto:linux-omap-
>> owner@xxxxxxxxxxxxxxx] On Behalf Of Paul Walmsley
>> Sent: Tuesday, October 20, 2009 8:21 PM
>
>> > This patch removes the SDRC AC timings changes done during core dvfs.
>> > Updating AC timing CTRL values for SDRC during DVFS is seen to be a
>risk,
>> > while the RFR CTRL value is safe to be updated.
>> >
>> > Signed-off-by: Rajendra Nayak <rnayak@xxxxxx>
>>
>> just wanted to let you know, I haven't forgotten about this one. Am
>trying
>> to get an answer from others as to whether AC timing register changes are
>> completely unsafe, in which case your patch is probably the best way to
>> move forward; or whether we can make the changes when no initiators are
>> touching SDRAM.
>
>It is not guaranteed safe to write actim registers on the fly to an active
>part.  It is safe to do RFR as it is buffered and sent out at a safe time.

I think that what Paul is suggesting is to change the ACTIM after ensuring that the DDR is in self-refresh. In that case it is perfectly valid; it is just tricky to ensure that all initiators are in mute before doing that.

Regards,
Benoit

>A few years back before omap3 as part of omap2 lessons learned this issue
>was highlighted but design was not able to change.  Recently implementation
>review at rtl provided the above points.
>
>I'm not aware of anyone seeing a crash but recommendation for safety is to
>not.
>
>Regards,
>Richard W.
>
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