On omap4 we're missing the fdif node with it's related "ti,hwmods"
property that the SoC interconnect code needs.
Note that this will only show up as a bug with "doesn't have
mpu register target base" boot errors when the legacy platform
data is removed.
Cc: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
Cc: Mark Rutland <mark.rutland@xxxxxxx>
Cc: Mauro Carvalho Chehab <mchehab@xxxxxxxxxx>
Cc: Rob Herring <robh+dt@xxxxxxxxxx>
Cc: Sakari Ailus <sakari.ailus@xxxxxx>
Signed-off-by: Tony Lindgren <tony@xxxxxxxxxxx>
---
.../devicetree/bindings/media/ti-fdif.txt | 29 ++++++++++++++++++++++
arch/arm/boot/dts/omap4.dtsi | 7 ++++++
2 files changed, 36 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/ti-fdif.txt
diff --git a/Documentation/devicetree/bindings/media/ti-fdif.txt b/Documentation/devicetree/bindings/media/ti-fdif.txt
new file mode 100644
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/ti-fdif.txt
@@ -0,0 +1,29 @@
+Texas Instruments Face Detect (FDIF) binding
+
+FDIF can be used for face detection on Texas Instruments SoCs.
+
+Required properties:
+
+compatible: Shall be one of the following:
+ "ti,omap4-fdif"
+
+reg: Shall contain the device instance IO range
+
+interrupts: Shall contain the device instance interrupt
+
+
+Optional properties:
+
+ti,hwmods: Shall contain the TI interconnect module name if needed
+ by the SoC
+
+
+Example:
+
+ fdif: fdif@4a10a000 {
+ compatible = "ti,omap4-fdif";
+ reg = <0x4a10a000 0x1000>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ ti,hwmods = "fdif";
+ };
+
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -889,6 +889,13 @@
};
};
+ fdif: fdif@4a10a000 {
+ compatible = "ti,omap4-fdif";
+ reg = <0x4a10a000 0x1000>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ ti,hwmods = "fdif";
+ };
+
timer1: timer@4a318000 {
compatible = "ti,omap3430-timer";
reg = <0x4a318000 0x80>;
--
2.14.1
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