Re: [PATCH] ARM: dts: omap3: Fix Reboot issue on Logic PD SOM-LV

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On Tue, Jan 24, 2017 at 12:39 PM, Tony Lindgren <tony@xxxxxxxxxxx> wrote:
> * Adam Ford <aford173@xxxxxxxxx> [170124 10:24]:
>> I appreciate you help on this.  I commented out every line and the
>> issue never resolved itself.  If anything commenting out
>> TWL_REMAP_OFF(RES_VPLL1, DEV_GRP_P1, 3, 1),  made the
>> problem worse, because MLO didn't even load.
>
> Hmm. Maybe it's the order of the configurations? See the notes about
> bad order in load_twl4030_script().
>
> Maybe try adding the reset configuration first?
>
>> > Also see if adding or leaving out "ti,system-power-controller" or
>> > "ti,use_poweroff" makes a difference.
>>
>> I tried removing that before I did anything else, and it didn't appear
>> to make any difference.  If you have any other ideas, I'm willing to try stuff.
>> I'll continue to dig around in here.
>
> OK. I would try adding one configuration at a time and see if the
> order or something in the configuration affects it.

It appears as if the first 'compatible' flag is the only one accepted.
Any subsequent ones are ignored.

I played around with a few different options including reordering
omap3_idle_scripts so omap3_wrst_script or first and neither did the
trick.

I added a bunch of debug code to see if we were getting any errors.

(sidenote: the error handing in twl4030-power.c is very inconsistent.
in some places we just exit on error with no message, and other places
we display an error and other places we display what failed.  I am not
complaining because I didn't hit any of the error traps, but this may
be hard for others to troubleshoot)

I know this doesn't say much, but the one line of code that made the
system work was to disable:

 /* Set ACTIVE to SLEEP SEQ address in T2 memory*/
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_A2S);

I am not an expert on the twl4030, but I am guessing that enables sleep.

Can you tell me what's different about the reboot sequence between the
the different power modes?  It seems to operate just fine in the
different power modes and the power savings is very nice.

>From what I can tell, we only have one reset sequence, yet with the
low power modes, it fails to access the MMC1.  Is it possible that
something in the PBIAS registers do or do not reset correctly?

> Note that you may need to power cycle the device for some time to
> clear any state in twl4030 if something goes wrong.

Of course.  I have been doing that with the backup battery disconnected.

> Regards,
>
> Tony

adam
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