On Mon, 2009-03-30 at 10:57 -0700, Kevin Hilman wrote: > Russ Dill <russ.dill@xxxxxxxxx> writes: > > > On Mon, Mar 30, 2009 at 3:08 AM, Premi, Sanjeev <premi@xxxxxx> wrote: > [...] > > >> I had found that two drivers that could prevent clocks_off are > >> USB and DSS because of the way they use clk_enable(). > >> > >> Can you try building without theses drivers just for verification? > >> > > > > Building without dss makes things worse: > > > > Powerdomain (dss_pwrdm) didn't enter target state 0 > > > > Maybe by looking at what the dss driver is doing I can get core and > > per to turn off. > > Peter, > > Have you tried with the debug patch I sent? If you can test with that > patch, and send the output, I can tell you what is preventing you from > hitting RET. No, not yet. After comments by Kevin and others regarding my DPLL setting being wrong from u-boot, I'm currently trying to bring up u-boot from the Beagle on the LV SOM. Then I can get the timings for the SDRC correct, and then work on getting the lates PM rebase (2.6.29) to boot. When I tried it with my current u-boot (based on 1.1.4 labrador), it would sporadically hang in rtc_hctosys and other functions that tried to talk to the twl4030 via i2c... I'm running into problems with u-boot (cloned the Beagle config) where I2C to setup power domains fails after the first write (bus gets stuck busy). > FWIW, the latest HEAD of the PM branch has that debug patch included. > > After doing the suspend/resume, just > > # cat /debug/pm_debug/registers/1 > > and attach the output. > > Kevin > -- Peter Barada <peterb@xxxxxxxxxxx> -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
