On 01/15/2016 01:22 PM, Tony Lindgren wrote:
> * Suman Anna <s-anna@xxxxxx> [160115 11:20]:
>> On 01/14/2016 08:11 AM, Kishon Vijay Abraham I wrote:
>>> Create platform data for PCIe and populate it with function
>>> pointers to perform assert and deassert of PCIe reset lines.
>>> The PCIe driver can use the callbacks provided here to
>>> reset the PCIe.
>>> This will be removed once the reset contoller driver is
>>> available to reset PCIe.
> ...
>
>>> +/**
>>> + * struct pci_dra7xx_platform_data - platform data specific to pci in dra7xx
>>> + * @reset_name: name of the reset line
>>> + * @assert_reset: callback for performing assert reset operation
>>> + * @deassert_reset: callback for performing deassert reset operation
>>> + */
>>> +struct pci_dra7xx_platform_data {
>>> + const char *reset_name;
>>> +
>>> + int (*assert_reset)(struct platform_device *pdev, const char *name);
>>> + int (*deassert_reset)(struct platform_device *pdev, const char *name);
>>> +};
>
> I doubt this platform_data is dra7 specific. I believe it's
> the same PCI controller that has been in the omap variants for
> years?
AFAIK, this only applies to DRA7. Sekhar/Kishon can confirm. I did take
a quick look at OMAP3/4/5 TRMs, and didn't find any. Neither did a grep
on current hwmod files other than DRA7. There's a DM81xx related PCI
clock domain, but don't see any corresponding driver/device for the same.
regards
Suman
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