On 18 Nov 2015, at 11:01, Matthijs van Duin <matthijsvanduin@xxxxxxxxx> wrote: > On 18 November 2015 at 09:26, Delio Brignoli <dbrignoli@xxxxxxxxxxxxxxxx> wrote: >>> This works in principle, but both minimizing the DCO and (often >>> needlessly) using the fractional multiplier seem like recipes to >>> maximize the clock jitter. Mind you, I don't know how much jitter >>> we’re talking about here, I don't recall having seen specs about this. >> >> We haven’t seen any specs either but testing shows that changing DCO mode causes >> the PLL to lose lock at least temporarily. > > Losing lock on reconfiguration is entirely a separate matter from > clock jitter. Sure, I just wanted to report a case in which the implementation you mention does something which may be undesirable. > The fractional multiplier works by essentially by > alternating between the nearest integer multiplier values. This will > be smoothed out by the loop filter, but it’s not going to vanish. […] > Now DPLLLJ will presumably do better, but without actual specs the > safe option is to avoid the fractional multiplier altogether. Still FYI, using adpll_ti814x.c from the linux-omap3 tree from the Arago project (i.e. the one you are talking about) hacked to prefer searching for neighbouring m2 values to DCO switching works OK for us (i.e. resulting jitter is low enough for our audio applications). — Delio -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
