On 12/15/2014 05:31 PM, Paul Walmsley wrote: > > I just took a quick glance at Tero's second patch, and it looks like a > hack to me. Better to fix the problem in the core CCF code if > possible. I don't think there's any reason why a PLL couldn't have > just one parent clock. But I'm fine with merging it as a short-term > fix if fixing the core code is difficult or risky. Can you describe what's wrong? Does the PLL have a mux with two inputs that map to the same clock? -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
