Re: [PATCH v5 1/4] ARM: dts: am335x-bone: add support for beaglebone NAND cape

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Hi,

* Pekon Gupta <pekon@xxxxxx> [140512 04:50]:
> +
> +&gpmc {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&nand_flash_x16>;
> +	ranges = <0 0 0 0x01000000>;	/* CS0: min address-space configurable under GPMC chip-select = 16MB*/
> +	nand@0,0 {
> +		reg = <0 0 0x380>; /* CS0, offset=0x0, GPMC register-space size=0x380 */

Just a nitpick comment on the comments.. But as we've gotten them
wrong for almost every GPMC entry so far, we should fix it.

The "GPMC register-space" here can be a bit confusing still
as they are really the the device IO registers. I suggest we
standardize the comments like this for GPMC:

&gpmc {
	pinctrl-names = "default";
	pinctrl-0 = <&nand_flash_x16>;
	ranges = <0 0 0 0x01000000>;	/* 16MB GPMC partition */
	nand@0,0 {
		reg = <0 0 0x380>;	/* device IO registers */
		...
};

Regards,

Tony
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