Hi,
I found the answer on page 179 of the OMAP3515/03
Applications Processor (Rev. B) document.
It states that "Higher LPDDR speed grades are supported due to
inherent JEDEC LPDDR backwards compatibility."
The "266" in LPDDR-266 refers to the data rate and it runs at a clock
speed of 133MHz.
Best regards,
Elvis Dowson
On Jan 2, 2009, at 1:31 AM, Elvis Dowson wrote:
Hi,
Is the micron 2GB POP LPDDR memory compatible with the TI
OMAP3503 processor? http://www.micron.com/products/partdetail?part=MT46H64M32L2JG-5%20IT
Quote from the technical reference manual:
"The SDRC module only supports low-power double-data-rate (LPDDR)
SDRAM devices. Memory devices can be interfaced to the SDRC using a
stacked-memory approach or through the printed circuit board (PCB).
The stacked-memory approach uses the package on package interface
pins (available on CBB & CBC package). The LPDDR interface on the
top of the POP package has been designed for compatibility any POP
LPDDR device with a matching footprint and compliance with the JEDEC
LPDDR-266 specification."
My point of confusion is
a. the Micron 2GB memory is stated to have a 200MHz clock rate and
the data rate is LPDDR400.
b. in the term JDEC LPDDR-266, does the 266 correspond to the data
rate? If so, can I use the LPDDR400 memory with the OMAP3503
processor, which requires an LPDDR-266 memory?
Best regards,
Elvis Dowson
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