34xx max supported ddr frequently is 166mhz. there should be no issue running a 200mhz rated ddr at 166. the real issues are with pin level interfacing. ________________________________________ From: linux-omap-owner@xxxxxxxxxxxxxxx [linux-omap-owner@xxxxxxxxxxxxxxx] On Behalf Of Elvis Dowson [elvis.dowson@xxxxxxx] Sent: Thursday, January 01, 2009 3:31 PM To: Linux OMAP Users Subject: LPDDR memory for TI OMAP 3503 processor Hi, Is the micron 2GB POP LPDDR memory compatible with the TI OMAP3503 processor? http://www.micron.com/products/partdetail?part=MT46H64M32L2JG-5%20IT Quote from the technical reference manual: "The SDRC module only supports low-power double-data-rate (LPDDR) SDRAM devices. Memory devices can be interfaced to the SDRC using a stacked-memory approach or through the printed circuit board (PCB). The stacked-memory approach uses the package on package interface pins (available on CBB & CBC package). The LPDDR interface on the top of the POP package has been designed for compatibility any POP LPDDR device with a matching footprint and compliance with the JEDEC LPDDR-266 specification." My point of confusion is a. the Micron 2GB memory is stated to have a 200MHz clock rate and the data rate is LPDDR400. b. in the term JDEC LPDDR-266, does the 266 correspond to the data rate? If so, can I use the LPDDR400 memory with the OMAP3503 processor, which requires an LPDDR-266 memory? Best regards, Elvis Dowson -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html