On Mon, Dec 22, 2008 at 4:19 AM, David Brownell <david-b@xxxxxxxxxxx> wrote: > On Wednesday 17 December 2008, Kanigeri, Hari wrote: >> When the DSP processes data, the DSP cache controller >> loads 128-Byte chunks (lines) from SDRAM and writes the >> data back in 128-Byte chunks. > > In short: it's the same kind of cache line sharing issue > that any other DMA-using software needs to be aware of, > except that (a) the lines are 128 bytes vs whatever ARM > uses, and (b) the other bus master is a CPU instead of > something relatively dumb. > > Any software that runs on non-x86 hardware will likely > have had to deal with such issues already, since most > hardware other than x86 relies on software to prevent > cache coherency goofs: no bus snooping, MOESI, etc. Do you know of any software doing some kind of processing that sends the data back? My guess is that there isn't a lot of software doing that. I think existing software would need to be updated to render video output efficiently (allocate Xv buffers properly aligned). -- Felipe Contreras -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
