RE: [PATCH 0/3] 3430 clock: add several 3430ES2-only clocks

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Hi Paul
Another Issue with the 34xx clock patch.

>Sent: Thursday, December 20, 2007 11:05 PM
>> The cause is the following check:
>> The GPT2 registers lie PER and the check is a hard coded value of CORE_MOD
>> The correct check for GPT2 should be OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN)
>> So the function returns in the following check.
>
>Thanks.  There's a temporary patch that was posted on December 3 to the
>list about this issue.  A better long-term fix is coming (for git
>consumption).  Let me know if you'd like me to resend...

I have put the temporary patch and it works and image does not crash on boot up.

However I have seen another problem on enable of 120m_fck

ENABLE[usbhost_120m_fck]
<3>clock.c: Enable for dpll5_ck without enable code
clock.c: Enable for dpll5_ck without enable code
<3>clock.c: Enable for dpll5_m2_ck without enable code
clock.c: Enable for dpll5_m2_ck without enable code
<3>clock.c: Enable for omap_120m_fck without enable code
clock.c: Enable for omap_120m_fck without enable code
<7>cm_write_reg: writing 0x2 to 0xd8005400

Could you check the logic you are using to enable the DPLL5? 


>
>
>- Paul
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