Re: NIC with msg signaled interrupts on a SMP machine

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On Thu, 1 Feb 2007, Jesse Brandeburg wrote:

> On 1/29/07, Svata Dedic <belgarat@xxxxxxxxxxxxxxx> wrote:
> > Hi,
> >
> > I am sorry to repeat the question, but so far I didn't get an answer on
> > whether MSI (Message Signaled Interrupts) handling is supposed to
> > respect with /proc/irq/*/smp_affinity mask bits. No matter what affinity
> > bits I am setting on my system, all MSIs are processed by CPU#0.
> 
> at least on 2.6.18 and 2.6.19, I've used smp_affinity and MSI vectors
> with no problems.  I have seen some quite weird behavior, where
> reading smp_affinity back reports no change, but the interrupts
> actually change CPUs so it is working.

Not about MSI, but about reading back the smp_affinity after changing
it and not seeing the change, what I've noticed is that if you read
the smp_affinity value immediately after the change, it won't reflect
the change, but once an interrupt is triggered on the device, then
you will see the new smp_affinity value (I believe this was on a
2.6.16 kernel).

						-Bill
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