RE: [EXT] Re: [RFC PATCH 0/3] Fix proposal for the Micron shallow erase issue

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] Fix proposal for the Micron shallow
> erase issue
> 
> Hi Bean,
> 
> "Bean Huo (beanhuo)" <beanhuo@xxxxxxxxxx> wrote on Mon, 4 May 2020
> 08:08:34 +0000:
> 
> > >
> > > So the questions are:
> > >
> > > 1/ What should we write exactly:
> > >     -> the main area
> > >     -> the OOB area
> > >     -> both
> > >    ?
> >
> > The Main area is ok.
> >
> > >
> > > 2/ Shall we prefer writing 8 even/odd pages starting from:
> > >     -> the beginning of the
> > >     -> the middle of the block
> > >     -> we do not care
> > >    ?
> > >
> > Follow the sequence of block programming, from the lowest to the highest
> page address.
> > This is normal programming sequence.  the beginning of the block make sense.
> 
> Thanks for answering! Any chance that you give us more details on the series
> which are affected?
> 
> Thanks,
> Miquèl


Hi, Miquel


Micron recommends to fill at least 15 pages before executing an erase operation on all planar SLC NAND. In normal operation, a NANC block
will be erased when many pages have been written to it.

Claimed performance degradation:

My patch checks the number of pages that have been programmed on the NAND and in most cases before an erase operation is executed
the blocks will be fully programmed. In the very rare case when additional pages need to be written, there will be some additional time required,
however as erase operations are infrequently executed, the claimed performance hit is unfounded and is not supported by any data.
Please support claims by actual data.

We have developed a patch that fully addresses the issue and we will rebase it with the latest Linux release.

Thanks,

Bean

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