Hi Boris,
On 30/4/2020 4:36 pm, Boris Brezillon wrote:
On Thu, 30 Apr 2020 16:30:15 +0800
"Ramuthevar, Vadivel MuruganX"
<vadivel.muruganx.ramuthevar@xxxxxxxxxxxxxxx> wrote:
And now I'd like you to explain why 5 is the right value for that field
(I guess that has to do with the position of the CS/ALE/CLE pins).
5 : bit 26, 25, 24, 23, 22 to be included for comparison in the
That's 6 bits to me, not 5.
No , 5 bits only the above case.
Oops, right, sorry for the brain fart.
The question is, is it the same value we have in nand_pa or it is
different?
Different address which is 0xE1400000 NAND_BASE_PHY address.
Then why didn't you tell me they didn't match when I suggested to pass
sorry, because you keep asking nand_pa after that only I realized that.
nand_pa? So now the question is, what does this address represent?
EBU-MODULE
_________ _______________________
| | | |NAND CTRL |
| FPI BUS |==>| CS0(0x174) | 0xE100 ( 0xE14/0xE1C) NAND_PHY_BASE
|_________| |_CS1(0x17C)_|__________ |
EBU_CONRTROLLER_BASE : 0xE0F0_0000
HSNAND_BASE: 0xE100_0000
NAND_CS0: 0xE140_0000
NAND_CS1: 0xE1C0_0000
MEM_REGION_BASE_CS0: 0x17400 (internal to ebu controller )
MEM_REGION_BASE_CS1: 0x17C00
Do you have a reference manual I can look at to understand what this is?
We dont have reference manual since it is new SoC, we keep get
information from HW team and we have only register map
Thanks a lot !!!
Regards
Vadivel
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