On Fri, Apr 17, 2020 at 04:23:26PM +0200, Jean-Philippe Brucker wrote: > The flash controller implemented by the Arm Base platform behaves like > the Intel StrataFlash J3 device, but omits several features. In > particular it doesn't implement a protection register, so "Number of > Protection register fields" in the Primary Vendor-Specific Extended > Query, is 0. > > The Intel StrataFlash J3 datasheet only lists 1 as a valid value for > NumProtectionFields. It describes the field as: > > "Number of Protection register fields in JEDEC ID space. > “00h,” indicates that 256 protection bytes are available" > > While a value of 0 may arguably not be architecturally valid, the > driver's current behavior is certainly wrong: if NumProtectionFields is > 0, read_pri_intelext() adds a negative value to the unsigned extra_size, > and ends up in an infinite loop. > > Fix it by ignoring a NumProtectionFields of 0. > > Signed-off-by: Jean-Philippe Brucker <jean-philippe@xxxxxxxxxx> > --- > I guess this flash device has never been tested on Linux. The bug showed > up when trying to boot the latest arm64 defconfig, which enabled > CONFIG_MTD_PHYSMAP_OF, on the RevC FastModel. Without this config option > the device isn't probed. Any progress with this patch ? FWIW, this fixes boot on few arm64 Arm Ltd FastModels we use for development including the above mentioned RevC FastModel. So, Tested-by: Sudeep Holla <sudeep.holla@xxxxxxx> -- Regards, Sudeep ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/