On Wed, 19 Oct 2022 12:06:52 -0500, Dinh Nguyen wrote: > Document the optional "altr,sysmgr-syscon" binding that is used to > access the System Manager register that controls the SDMMC clock > phase. > > Signed-off-by: Dinh Nguyen <dinguyen@xxxxxxxxxx> > --- > v5: document reg shift > v4: add else statement > v3: document that the "altr,sysmgr-syscon" binding is only applicable to > "altr,socfpga-dw-mshc" > v2: document "altr,sysmgr-syscon" in the MMC section > --- > .../bindings/mmc/synopsys-dw-mshc.yaml | 32 +++++++++++++++++-- > 1 file changed, 29 insertions(+), 3 deletions(-) > Running 'make dtbs_check' with the schema in this patch gives the following warnings. Consider if they are expected or the schema is incorrect. These may not be new warnings. Note that it is not yet a requirement to have 0 warnings for dtbs_check. This will change in the future. Full log is available here: https://patchwork.ozlabs.org/patch/ dwmmc0@ff704000: $nodename:0: 'dwmmc0@ff704000' does not match '^mmc(@.*)?$' arch/arm/boot/dts/socfpga_arria5_socdk.dtb arch/arm/boot/dts/socfpga_cyclone5_chameleon96.dtb arch/arm/boot/dts/socfpga_cyclone5_de0_nano_soc.dtb arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dtb arch/arm/boot/dts/socfpga_cyclone5_socdk.dtb arch/arm/boot/dts/socfpga_cyclone5_sockit.dtb arch/arm/boot/dts/socfpga_cyclone5_socrates.dtb arch/arm/boot/dts/socfpga_cyclone5_sodia.dtb arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dtb arch/arm/boot/dts/socfpga_vt.dtb dwmmc0@ff704000: 'altr,sysmgr-syscon' is a required property arch/arm/boot/dts/socfpga_arria5_socdk.dtb arch/arm/boot/dts/socfpga_cyclone5_chameleon96.dtb arch/arm/boot/dts/socfpga_cyclone5_de0_nano_soc.dtb arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dtb arch/arm/boot/dts/socfpga_cyclone5_socdk.dtb arch/arm/boot/dts/socfpga_cyclone5_sockit.dtb arch/arm/boot/dts/socfpga_cyclone5_socrates.dtb arch/arm/boot/dts/socfpga_cyclone5_sodia.dtb dwmmc0@ff704000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'broken-cd', 'bus-width', 'cap-mmc-highspeed', 'cap-sd-highspeed', 'cd-gpios', 'fifo-depth', 'resets', 'vmmc-supply', 'vqmmc-supply' were unexpected) arch/arm/boot/dts/socfpga_cyclone5_socdk.dtb arch/arm/boot/dts/socfpga_cyclone5_sodia.dtb dwmmc0@ff704000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'broken-cd', 'bus-width', 'cap-mmc-highspeed', 'cap-sd-highspeed', 'fifo-depth', 'resets', 'vmmc-supply', 'vqmmc-supply' were unexpected) arch/arm/boot/dts/socfpga_arria5_socdk.dtb arch/arm/boot/dts/socfpga_cyclone5_chameleon96.dtb arch/arm/boot/dts/socfpga_cyclone5_de0_nano_soc.dtb arch/arm/boot/dts/socfpga_cyclone5_sockit.dtb dwmmc0@ff704000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'broken-cd', 'bus-width', 'cap-mmc-highspeed', 'cap-sd-highspeed', 'fifo-depth', 'resets' were unexpected) arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dtb arch/arm/boot/dts/socfpga_cyclone5_socrates.dtb arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dtb arch/arm/boot/dts/socfpga_vt.dtb dwmmc0@ff808000: $nodename:0: 'dwmmc0@ff808000' does not match '^mmc(@.*)?$' arch/arm/boot/dts/socfpga_arria10_chameleonv3.dtb arch/arm/boot/dts/socfpga_arria10_socdk_nand.dtb arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dtb arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dtb dwmmc0@ff808000: 'altr,sysmgr-syscon' is a required property arch/arm/boot/dts/socfpga_arria10_chameleonv3.dtb arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dtb dwmmc0@ff808000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'broken-cd', 'bus-width', 'cap-mmc-highspeed', 'cap-sd-highspeed', 'fifo-depth', 'resets' were unexpected) arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dtb dwmmc0@ff808000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'broken-cd', 'bus-width', 'cap-sd-highspeed', 'fifo-depth', 'resets' were unexpected) arch/arm/boot/dts/socfpga_arria10_chameleonv3.dtb dwmmc0@ff808000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'fifo-depth', 'resets' were unexpected) arch/arm/boot/dts/socfpga_arria10_socdk_nand.dtb arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dtb mmc@ff808000: 'altr,sysmgr-syscon' is a required property arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dtb arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dtb arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dtb arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dtb mmc@ff808000: Unevaluated properties are not allowed ('altr,dw-mshc-ciu-div', 'altr,dw-mshc-sdr-timing', 'iommus' were unexpected) arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dtb mmc@ff808000: Unevaluated properties are not allowed ('iommus' was unexpected) arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dtb arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dtb arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dtb arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dtb arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dtb arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dtb mmcsd@40004000: $nodename:0: 'mmcsd@40004000' does not match '^mmc(@.*)?$' arch/arm/boot/dts/lpc4337-ciaa.dtb arch/arm/boot/dts/lpc4350-hitex-eval.dtb arch/arm/boot/dts/lpc4357-ea4357-devkit.dtb arch/arm/boot/dts/lpc4357-myd-lpc4357.dtb mmcsd@40004000: clock-names:0: 'biu' was expected arch/arm/boot/dts/lpc4337-ciaa.dtb arch/arm/boot/dts/lpc4350-hitex-eval.dtb arch/arm/boot/dts/lpc4357-ea4357-devkit.dtb arch/arm/boot/dts/lpc4357-myd-lpc4357.dtb mmcsd@40004000: clock-names:1: 'ciu' was expected arch/arm/boot/dts/lpc4337-ciaa.dtb arch/arm/boot/dts/lpc4350-hitex-eval.dtb arch/arm/boot/dts/lpc4357-ea4357-devkit.dtb arch/arm/boot/dts/lpc4357-myd-lpc4357.dtb mmcsd@40004000: Unevaluated properties are not allowed ('bus-width', 'clock-names', 'resets', 'vmmc-supply' were unexpected) arch/arm/boot/dts/lpc4357-ea4357-devkit.dtb arch/arm/boot/dts/lpc4357-myd-lpc4357.dtb mmcsd@40004000: Unevaluated properties are not allowed ('clock-names', 'resets' were unexpected) arch/arm/boot/dts/lpc4337-ciaa.dtb arch/arm/boot/dts/lpc4350-hitex-eval.dtb
