Hi,
Just wanted to address the comments regarding the dt-bindings
document of "altr,sysmgr-syscon". I ran the 'make dt_binding_check'
after: pip3 install dtschema --upgrade and I checked to make sure I have
yamllint installed and I still don't see any warnings. I'm also confused
about whether "altr,socfpga-dw-mshc" should be a const. I see the same
usage in:
Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml
allOf:
- $ref: "mmc-controller.yaml#"
- if:
properties:
compatible:
contains:
const: arasan,sdhci-5.1
Please advise on how to address this comment!
Thanks,
Dinh
Dinh Nguyen (6):
dt-bindings: mmc: synopsys-dw-mshc: document "altr,sysmgr-syscon"
arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node
arm: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node
mmc: dw_mmc-pltfm: socfpga: add method to configure clk-phase
clk: socfpga: remove the setting of clk-phase for sdmmc_clk
arm: dts: socfpga: remove "clk-phase" in sdmmc_clk
.../bindings/mmc/synopsys-dw-mshc.yaml | 32 ++++++++-
arch/arm/boot/dts/socfpga.dtsi | 2 +-
arch/arm/boot/dts/socfpga_arria10.dtsi | 2 +-
.../boot/dts/socfpga_arria10_mercury_aa1.dtsi | 1 +
.../boot/dts/socfpga_arria10_socdk_sdmmc.dts | 1 +
arch/arm/boot/dts/socfpga_arria5.dtsi | 1 +
arch/arm/boot/dts/socfpga_cyclone5.dtsi | 1 +
arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi | 1 +
.../boot/dts/altera/socfpga_stratix10.dtsi | 1 +
.../dts/altera/socfpga_stratix10_socdk.dts | 1 +
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 1 +
.../boot/dts/intel/socfpga_agilex_socdk.dts | 1 +
.../boot/dts/intel/socfpga_n5x_socdk.dts | 1 +
drivers/clk/socfpga/clk-gate-a10.c | 68 -------------------
drivers/clk/socfpga/clk-gate.c | 60 ----------------
drivers/clk/socfpga/clk.h | 1 -
drivers/mmc/host/dw_mmc-pltfm.c | 43 +++++++++++-
17 files changed, 83 insertions(+), 135 deletions(-)
--
2.25.1
