Re: imx7d: Timeout waiting for hardware interrupt.

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Hi Bough,

On Wed, Oct 19, 2022 at 7:48 AM Bough Chen <haibo.chen@xxxxxxx> wrote:

> Hi Fabio,
>
> Yes, I think imx7d also has this limitation. Can you check whether the ipg and ahb clock source from pll_drm_533_clk on 5.10 stable tree?
>
>
>  67static const char *nand_usdhc_bus_sel[] = { "osc", "pll_sys_pfd2_270m_clk",
>  68         "pll_dram_533m_clk", "pll_sys_main_240m_clk",
>  69         "pll_sys_pfd2_135m_clk", "pll_sys_pfd6_clk", "pll_enet_250m_clk",
>  70         "pll_audio_post_div", };
>  71
>  72 static const char *ahb_channel_sel[] = { "osc", "pll_sys_pfd2_270m_clk",
>  73         "pll_dram_533m_clk", "pll_sys_pfd0_392m_clk",
>  74         "pll_enet_250m_clk", "pll_usb_main_clk", "pll_audio_post_div",
>  75         "pll_video_post_div", };

By default, on imx7 the ahb_root_clk and nand_usdhc_root_clk have the
same pll_sys_pfd2_270m_clk parent:

             pll_sys_pfd2_270m_clk       1        1        0
270000000          0     0  50000
                nand_usdhc_src        0        0        0   270000000
        0     0  50000
                   nand_usdhc_cg       0        0        0   270000000
         0     0  50000
                      nand_usdhc_pre_div       0        0        0
270000000          0     0  50000
                         nand_usdhc_root_clk       0        0        0
  270000000          0     0  50000
                            nand_usdhc_rawnand_clk       0        0
    0   270000000          0     0  50000
                ahb_src               1        1        0   270000000
        0     0  50000
                   ahb_cg             1        1        0   270000000
        0     0  50000
                      ahb_pre_div       1        1        0
270000000          0     0  50000
                         ahb_root_clk       2        3        0
135000000          0     0  50000

So they satisfy the condition requested by the erratum.

Do you know if we should increase the interrupt timeouts like the done
in the MSM driver?

commit 3f8920c5706e9a688705b6217996cde01e851591
Author: Shaik Sajida Bhanu <sbhanu@xxxxxxxxxxxxxx>
Date:   Fri Jul 16 17:16:14 2021 +0530

    mmc: sdhci-msm: Update the software timeout value for sdhc

    [ Upstream commit 67b13f3e221ed81b46a657e2b499bf8b20162476 ]

    Whenever SDHC run at clock rate 50MHZ or below, the hardware data
    timeout value will be 21.47secs, which is approx. 22secs and we have
    a current software timeout value as 10secs. We have to set software
    timeout value more than the hardware data timeout value to avioid seeing
    the below register dumps.

    [  332.953670] mmc2: Timeout waiting for hardware interrupt.
    [  332.959608] mmc2: sdhci: ============ SDHCI REGISTER DUMP ===========
    [  332.966450] mmc2: sdhci: Sys addr:  0x00000000 | Version:  0x00007202
    [  332.973256] mmc2: sdhci: Blk size:  0x00000200 | Blk cnt:  0x00000001
    [  332.980054] mmc2: sdhci: Argument:  0x00000000 | Trn mode: 0x00000027
    [  332.986864] mmc2: sdhci: Present:   0x01f801f6 | Host ctl: 0x0000001f
    [  332.993671] mmc2: sdhci: Power:     0x00000001 | Blk gap:  0x00000000
    [  333.000583] mmc2: sdhci: Wake-up:   0x00000000 | Clock:    0x00000007
    [  333.007386] mmc2: sdhci: Timeout:   0x0000000e | Int stat: 0x00000000
    [  333.014182] mmc2: sdhci: Int enab:  0x03ff100b | Sig enab: 0x03ff100b
    [  333.020976] mmc2: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000000
    [  333.027771] mmc2: sdhci: Caps:      0x322dc8b2 | Caps_1:   0x0000808f
    [  333.034561] mmc2: sdhci: Cmd:       0x0000183a | Max curr: 0x00000000
    [  333.041359] mmc2: sdhci: Resp[0]:   0x00000900 | Resp[1]:  0x00000000
    [  333.048157] mmc2: sdhci: Resp[2]:   0x00000000 | Resp[3]:  0x00000000
    [  333.054945] mmc2: sdhci: Host ctl2: 0x00000000
    [  333.059657] mmc2: sdhci: ADMA Err:  0x00000000 | ADMA Ptr:
    0x0000000ffffff218
    [  333.067178] mmc2: sdhci_msm: ----------- VENDOR REGISTER DUMP
    -----------
    [  333.074343] mmc2: sdhci_msm: DLL sts: 0x00000000 | DLL cfg:
    0x6000642c | DLL cfg2: 0x0020a000
    [  333.083417] mmc2: sdhci_msm: DLL cfg3: 0x00000000 | DLL usr ctl:
    0x00000000 | DDR cfg: 0x80040873
    [  333.092850] mmc2: sdhci_msm: Vndr func: 0x00008a9c | Vndr func2 :
    0xf88218a8 Vndr func3: 0x02626040
    [  333.102371] mmc2: sdhci: ============================================

    So, set software timeout value more than hardware timeout value.

    Signed-off-by: Shaik Sajida Bhanu <sbhanu@xxxxxxxxxxxxxx>
    Acked-by: Adrian Hunter <adrian.hunter@xxxxxxxxx>
    Cc: stable@xxxxxxxxxxxxxxx
    Link: https://lore.kernel.org/r/1626435974-14462-1-git-send-email-sbhanu@xxxxxxxxxxxxxx
    Signed-off-by: Ulf Hansson <ulf.hansson@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

Or any other suggestions?

Thanks



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