> -----Original Message-----
> From: Fabio Estevam <festevam@xxxxxxxxx>
> Sent: 2022年10月19日 1:20
> To: Bough Chen <haibo.chen@xxxxxxx>
> Cc: linux-mmc <linux-mmc@xxxxxxxxxxxxxxx>; Adrian Hunter
> <adrian.hunter@xxxxxxxxx>; dl-linux-imx <linux-imx@xxxxxxx>; Sebastian
> Reichel <sebastian.reichel@xxxxxxxxxxxxx>; Martin Fuzzey
> <martin.fuzzey@flowbird.group>
> Subject: Re: imx7d: Timeout waiting for hardware interrupt.
>
> Hi Bough,
>
> On Tue, Oct 18, 2022 at 9:29 AM Fabio Estevam <festevam@xxxxxxxxx> wrote:
>
> > Would you have any other suggestions as to why this timeout happens?
>
> Do you know if the following i.MX8M erratum applies to the imx7d as well?
Hi Fabio,
Yes, I think imx7d also has this limitation. Can you check whether the ipg and ahb clock source from pll_drm_533_clk on 5.10 stable tree?
67static const char *nand_usdhc_bus_sel[] = { "osc", "pll_sys_pfd2_270m_clk",
68 "pll_dram_533m_clk", "pll_sys_main_240m_clk",
69 "pll_sys_pfd2_135m_clk", "pll_sys_pfd6_clk", "pll_enet_250m_clk",
70 "pll_audio_post_div", };
71
72 static const char *ahb_channel_sel[] = { "osc", "pll_sys_pfd2_270m_clk",
73 "pll_dram_533m_clk", "pll_sys_pfd0_392m_clk",
74 "pll_enet_250m_clk", "pll_usb_main_clk", "pll_audio_post_div",
75 "pll_video_post_div", };
Best Regards
Haibo Chen
>
> e11232: USDHC: uSDHC setting requirement for IPG_CLK and AHB_BUS clocks
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.nxp
> .com%2Fdocs%2Fen%2Ferrata%2FIMX8MDQLQ_1N14W.pdf&data=05%7
> C01%7Chaibo.chen%40nxp.com%7C23932650782d4c1c68ee08dab12d03c7%7C
> 686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C638017104137800766%7
> CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI
> 6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=G%2FmrmH5
> V659jok782%2BX4E8Nr67aNuISpfeyg8q4jetY%3D&reserved=0
>
> Thanks
