On 09/26/2013 06:45 AM, Arjan van de Ven wrote: > On 9/25/2013 4:47 PM, Andi Kleen wrote: >>> Also, the changelogs don't appear to discuss one obvious downside: the >>> latency incurred in bringing a bank out of one of the low-power states >>> and back into full operation. Please do discuss and quantify that to >>> the best of your knowledge. >> >> On Sandy Bridge the memry wakeup overhead is really small. It's on by >> default >> in most setups today. > > btw note that those kind of memory power savings are content-preserving, > so likely a whole chunk of these patches is not actually needed on SNB > (or anything else Intel sells or sold) > Umm, why not? By consolidating the allocations to fewer memory regions, this patchset also indirectly consolidates the *references* as well. And its the lack of memory references that really makes the hardware transition the unreferenced banks to low-power (content-preserving) states. So from what I understand, this patchset should provide noticeable benefits on Intel/SNB platforms as well. (BTW, even in the prototype powerpc hardware that I mentioned, the primary memory power savings is expected to come from content-preserving states. So its not like this patchset was designed only for content-losing/full-poweroff type of scenarios). Regards, Srivatsa S. Bhat -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@xxxxxxxxx. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: <a href=mailto:"dont@xxxxxxxxx";> email@xxxxxxxxx </a>