Re: [PATCH v2 0/1] clk: jz4725b: fix mmc0 clock gating

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Hi,

Le ven., févr. 4 2022 at 21:22:04 +0300, Siarhei Volkau <lis8215@xxxxxxxxx> a écrit :
пт, 4 февр. 2022 г. в 14:06, Paul Cercueil <paul@xxxxxxxxxxxxxxx>:

 Hi,

 Le ven., févr. 4 2022 at 10:21:40 +0300, Siarhei Volkau
 <lis8215@xxxxxxxxx> a écrit :
Can you confirm that the MMC0 controller will work even with the bit 6
 off?

 Do you know if the MMC0 bit has been moved elsewhere, or the MMC0
 controller is permanently enabled?

Do you mean when the clock is off (bit == 1) or bit == 0 (the clock is on)?

By "permanently enabled" I meant that maybe there is no bit in the CLKGR register that can gate this clock.

Anyway what I tried:
I tried not enabling this clock in the UBIBoot - it just works. I guess
boot ROM enables it earlier.

The mmc0 clock is ungated by default at bootup, yes.

But when I explicitly disable the clock it doesn't boot.
So I assume bit 6 definitely gates the MMC0
clock, as stated in the jz4725b programmer's manual.

Ok, so bit 6 is indeed MMC0 and not I2S.

Then I disabled MMC0 in Ubiboot to run Linux from MMC1 and tested
the audio with disabled MMC0, in dts mmc0 node was disabled as well.
With this patch applied sound works well. So I guess the bit 6 isn't
related to the I2S clocking at all.

Hope I answered your questions.

Ok, then:
Reviewed-by: Paul Cercueil <paul@xxxxxxxxxxxxxxx>

Since it's a bug fix, you need to also add a fixes tag:
Fixes: 226dfa4726eb ("clk: Add Ingenic jz4725b CGU driver")

And add <stable@xxxxxxxxxxxxxxx> in the Cc: list.

Cheers,
-Paul





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