Re: [PATCH v2 0/1] clk: jz4725b: fix mmc0 clock gating

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Hi,

Le ven., févr. 4 2022 at 10:21:40 +0300, Siarhei Volkau <lis8215@xxxxxxxxx> a écrit :
The mmc0 clock gate bit was mistakenly assigned to "i2s" clock.
You can find that the same bit is assigned to "mmc0" too.
It leads to mmc0 hang for a long time after any sound activity
also it  prevented PM_SLEEP to work properly.
I guess it was introduced by copy-paste from jz4740 driver
where it is really controls I2S clock gate.

Ok, I was wondering why it didn't happen on other JZ4725B devices, it turns out they all use NAND + mmc1, and mmc0 is unused.

Can you confirm that the MMC0 controller will work even with the bit 6 off?

Do you know if the MMC0 bit has been moved elsewhere, or the MMC0 controller is permanently enabled?

Cheers,
-Paul





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