Re: [PATCH 0/1] clk: jz4725b: fix mmc0 clock gating

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Hi Siarhei,

Le ven., févr. 4 2022 at 08:26:40 +0300, Siarhei Volkau <lis8215@xxxxxxxxx> a écrit :
The mmc0 clock gate bit was mistakenly assigned to "i2s" clock.
You can find that the same bit is assigned to "mmc0" too.
It leads to mmc0 hang for a long time after any sound activity
also it  prevented PM_SLEEP to work properly.
I guess it was introduced by copy-paste from jz4740 driver
where it is really controls I2S clock gate.

This is useful information, please use the same text in the commit message.

However... My JZ4725B programming manual does say that the MMC0 clock is gated with bit 6, and the I2S clock has no gating bit.

Where did you find this info?

Cheers,
-Paul


Siarhei Volkau (1):
  clk: jz4725b: fix mmc0 clock gating

 drivers/clk/ingenic/jz4725b-cgu.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

--
2.35.1






[Index of Archives]     [LKML Archive]     [Linux ARM Kernel]     [Linux ARM]     [Git]     [Yosemite News]     [Linux SCSI]     [Linux Hams]

  Powered by Linux