My apologies for the slow response...I'm running far behind.
On Thu, 31 Jan 2013 00:29:13 -0800
Albert Wang <twang13@xxxxxxxxxxx> wrote:
> As you know, we are working on adding B_DMA_SG support on soc_camera mode.
>
> We found there is some code we can't understand in irq handler:
> >>>>>>
> if (handled == IRQ_HANDLED) {
> set_bit(CF_DMA_ACTIVE, &cam->flags);
> if (cam->buffer_mode == B_DMA_sg)
> mcam_ctlr_stop(cam);
> }
> <<<<<<
>
> The question is why we need stop ccic in irq handler when buffer mode is B_DMA_sg?
That's actually intended to be addressed by this comment in the DMA setup
code:
/*
* Frame completion with S/G is trickier. We can't muck with
* a descriptor chain on the fly, since the controller buffers it
* internally. So we have to actually stop and restart; Marvell
* says this is the way to do it.
*
...and, indeed, at the time, I was told by somebody at Marvell that I
needed to stop the controller before I could store a new descriptor into
the chain. I don't see how it could work otherwise, really?
I'd be happy to see this code go, it always felt a bit hacky. But the
controller buffers the descriptor chain deep inside its unreachable guts,
so one has to mess with it carefully.
Thanks,
jon
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