Hi Fabio, On Tue, 2021-06-08 at 00:13 -0300, Fabio Estevam wrote: > On Mon, May 17, 2021 at 8:48 PM Fabio Estevam <festevam@xxxxxxxxx> wrote: > > > Setting pipeline to PAUSED ... > > Pipeline is live and does not need PREROLL ... > > Pipeline is PREROLLED ... > > Setting pipeline to PLAYING ... > > New clock: GstSystemClock > > [ 11.745511] imx6-mipi-csi2: LP-11 wait timeout, likely a sensor > > driver bug, expect capture failures. > > [ 11.754956] imx6-mipi-csi2: phy_state = 0x00000200 > > [ 12.259957] imx6-mipi-csi2: clock lane timeout, phy_state = 0x00000200 > > [ 12.266630] ipu1_ic_prpvf: upstream stream on failed: -110 > > [ 12.274082] ipu1_ic_prpvf: pipeline start failed with -110 > > ERROR: from element /GstPipeline:pipeline0/GstV4l2Src:v4l2src0: Failed > > to allocate required memory. > > Additional debug info: > > ../sys/v4l2/gstv4l2src.c(659): gst_v4l2src_decide_allocation (): > > /GstPipeline:pipeline0/GstV4l2Src:v4l2src0: > > Buffer pool activation failed > > Execution ended after 0:00:01.072478334 > > Setting pipeline to NULL ... > > Freeing pipeline ... > > > > Not sure why I am getting LP-11 and clock lane timeouts though. > > I saw this post: > https://ez.analog.com/linux-software-drivers/f/q-a/535279/adv7282-m-dts-how-to-connect-adv-to-ipu1_csi0 > > and Frieder's patch: > https://git.kontron-electronics.de/linux/linux/-/commit/0d90331a44d0f718b7327a94fc72612ddcb4ac0f.patch > > I applied Frieder's patch, but still getting the same errors below > upon launching Gstreamer.: > > New clock: GstSystemClock > [ 11.745511] imx6-mipi-csi2: LP-11 wait timeout, likely a sensor > driver bug, expect capture failures. > [ 11.754956] imx6-mipi-csi2: phy_state = 0x00000200 > [ 12.259957] imx6-mipi-csi2: clock lane timeout, phy_state = 0x00000200 > [ 12.266630] ipu1_ic_prpvf: upstream stream on failed: -110 > [ 12.274082] ipu1_ic_prpvf: pipeline start failed with -110 > > Does anyone know what needs to be done to avoid the LP-11 timeout error? The i.MX6 CSI-2 RX needs to see the LP-11 low power state on the lanes during streamon (before it calls the ADV7280-M s_stream(1)). That's where the LP-11 timeout error occurs. According to the ADV7280(-M) datasheet, "after the ADV7280-M is programmed, the clock lanes exit low power mode and remain in high speed mode until the part is reset or powered down." So it appears the ADV7280-M has to be freshly powered on in s_power(1) for this to work. Is the ADV7280-M powerdown GPIO connected properly on your board? Moving the CSI-2 configuration from s_power to s_stream was exactly the right thing to do in my mind. Just as a test, if you remove the CSI-2 register writes from either s_power and s_stream from the adv7180 driver completely, do you still run into the LP-11 timeout? If the CSI-2 TX never leaves the low power state, I would expect seeing the clock lane timeout instead regards Philipp
