Hello Mark, On Tue, 2019-12-10 at 12:11 +0000, Mark Brown wrote: > On Tue, Dec 10, 2019 at 11:14:48AM +0000, Vaittinen, Matti wrote: > > > Problem is that if no default voltages are given from DT, the the > > first > > voltage changes are likely to be slow (require register access - I > > guess the HW defaults are not working for many use-cases) - which > > may > > be undesirable. > > I don't think that's likely to be a practical problem, and it's not > likely it'd be worse than always doing writes. A lot of things are > slower the first time you do them and you're still going to have to > do the writes no matter what. The thing is that if we do initial setting of voltages (based on binding data) we can set the voltages to registers before we switch to that run-level. If we don't do initial setting then we will only do setting when voltage change is actually requested - which may be too late. (I actually heard somewhere that there is 40 uS time limit - but I don't see how this is counted. Starting from what? - and I don't see how this is guaranteed even with GPIO if interrupts are to be served). OTOH, I also heard that the SoC probably require at least two of the bucks to be controlled as a group (bucks connected to SRAM and CORE) - probably all four. So, I am again wondering if I should just upstream the basic control with I2C for SoCs which do not require fast DVS voltage changes and perhaps maintain/provide own set of patches with additional interface for run-level control for those customers who require it... Sorry for being such a difficult guy. Decision making seems to not be my strong point :/ Br, Matti Vaittinen
