Hi Mike.
On Wed, Jan 18, 2012 at 07:13:41AM -0500, Mike Frysinger wrote:
> i've been flipping through the source but haven't made much headway. the
> documentation doesn't really cover kbuild internals, so that didn't help.
> hopefully someone here can point me in the right direction.
>
> i'm interested in the exact make mechanics that kbuild utilizes to avoid make
> recursion (`make -C`) but while supporting its own include recursion.
>
> for example, fs/Makefile has lines like:
> obj-y += ramfs/
> where is the logic that parses $(obj-y) and knows that it needs to recursively
> include ramfs/Makefile ?
When the 'core' part of kbuild is started then this is done using:
$(Q)$(MAKE) -f scripts/Makefile.build obj=$@
Where obj is the directory which contains the files to be build.
In your example obj=fs
Makefile.build will include the following files:
-include include/config/auto.conf <= The configuration (CONFIG_ symbols)
include scripts/Kbuild.include <= core Kbuild stuff
include $(obj)/Makefile <= the ramfs Makefile
include scripts/Makefile.lib <= additional kbuild stuff required after ramfs file include
In Makefile.lib we append built-in.o to $(obj-y) and we prefix with $(obj)
so we end up with:
obj-y == fs/ramfs/built-in.o
Later we add a dependency like this:
fs/built-in.o: fs/ramfs/built-in.o
It looks like this in Makefile.build:
$(builtin-target): $(obj-y) FORCE
$(call if_changed,link_o_target)
So make knows it need to build fs/ramfs/built-in.o first.
In Makefile.lib we build up a list of .o files which does not
live in the current directory in $(subdir-obj-y)
And in Makefile.build we tell make to visit the subdirs to build these files using:
# To build objects in subdirs, we need to descend into the directories
$(sort $(subdir-obj-y)): $(subdir-ym) ;
PHONY += $(subdir-ym)
$(subdir-ym):
$(Q)$(MAKE) $(build)=$@
So make will visit fs/ and see that it needs to visit fs/ramfs/ before
if can link fs/built-in.o
Simple - no?
Hope this helps.
Sam
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