Add support for reference doubler enable and reference divide by 2
clock.
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@xxxxxxxxxx>
---
no changes in v2. (added cover letter as requested)
.../devicetree/bindings/iio/frequency/adf4371.yaml | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml
index 1cb2adaf66f9..ef241c38520c 100644
--- a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml
+++ b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml
@@ -40,6 +40,17 @@ properties:
output stage will shut down until the ADF4371/ADF4372 achieves lock as
measured by the digital lock detect circuitry.
+ adi,reference-doubler-enable:
+ type: boolean
+ description:
+ If this property is present, the reference doubler block is enabled.
+
+ adi,adi,reference-div2-enable:
+ type: boolean
+ description:
+ If this property is present, the reference divide by 2 clock is enabled.
+ This feature can be used to provide a 50% duty cycle signal to the PFD.
+
required:
- compatible
- reg
--
2.47.0
