There weren't any major revisions or this time around and there weren't any more long discussions on higher level design, so I've dropped the RFC label and started polishing things up a bit more. So hopefully we are getting close to a final version. --- Changes in v5: - Dropped pwm patch. A variant of this patch has been picked up in the pwm tree. - Addressed review comments (see details in individual patches). - Added some polish, like MAINTAINERS entries and updating ADC docs. - Link to v4: https://lore.kernel.org/r/20241023-dlech-mainline-spi-engine-offload-2-v4-0-f8125b99f5a1@xxxxxxxxxxxx Changes in v4: - Dropped #spi-offload-cells and spi-offload properties from DT bindings. - Made an attempt at a more generic trigger interface instead of using clk framework. This also includes a new driver for a generic PWM trigger. - Addressed IIO review comments. - Added new patches for iio/adc/ad4695 as 2nd user of SPI offload. - Link to v3: https://lore.kernel.org/r/20240722-dlech-mainline-spi-engine-offload-2-v3-0-7420e45df69b@xxxxxxxxxxxx Changes in v3: - Reworked DT bindings to have things physically connected to the SPI controller be properties of the SPI controller and use more conventional provider/consumer properties. - Added more SPI APIs for peripheral drivers to use to get auxillary offload resources, like triggers. - Link to v2: https://lore.kernel.org/r/20240510-dlech-mainline-spi-engine-offload-2-v2-0-8707a870c435@xxxxxxxxxxxx Individual patches have more details on these changes and earlier revisions too. --- As a recap, here is the background and end goal of this series: The AXI SPI Engine is a SPI controller that has the ability to record a series of SPI transactions and then play them back using a hardware trigger. This allows operations to be performed, repeating many times, without any CPU intervention. This is needed for achieving high data rates (millions of samples per second) from ADCs and DACs that are connected via a SPI bus. The offload hardware interface consists of a trigger input and a data output for the RX data. These are connected to other hardware external to the SPI controller. To record one or more transactions, commands and TX data are written to memories in the controller (RX buffer is not used since RX data gets streamed to an external sink). This sequence of transactions can then be played back when the trigger input is asserted. This series includes core SPI support along with the first SPI controller (AXI SPI Engine) and SPI peripheral (AD7944 ADC) that use them. This enables capturing analog data at 2 million samples per second. The hardware setup looks like this: +-------------------------------+ +------------------+ | | | | | SOC/FPGA | | AD7944 ADC | | +---------------------+ | | | | | AXI SPI Engine | | | | | | SPI Bus ============ SPI Bus | | | | | | | | | +---------------+ | | | | | | | Offload 0 | | | +------------------+ | | | RX DATA OUT > > > > | | | | TRIGGER IN < < < v | | | +---------------+ | ^ v | | +---------------------+ ^ v | | | AXI PWM | ^ v | | | CH0 > ^ v | | +---------------------+ v | | | AXI DMA | v | | | CH0 < < < | | +---------------------+ | | | +-------------------------------+ --- David Lechner (16): spi: add basic support for SPI offloading spi: offload: add support for hardware triggers spi: dt-bindings: add trigger-source.yaml spi: dt-bindings: add PWM SPI offload trigger spi: offload-trigger: add PWM trigger driver spi: add offload TX/RX streaming APIs spi: dt-bindings: axi-spi-engine: add SPI offload properties spi: axi-spi-engine: implement offload support iio: buffer-dmaengine: document iio_dmaengine_buffer_setup_ext iio: buffer-dmaengine: add devm_iio_dmaengine_buffer_setup_ext2() iio: adc: ad7944: don't use storagebits for sizing iio: adc: ad7944: add support for SPI offload doc: iio: ad7944: describe offload support dt-bindings: iio: adc: adi,ad4695: add SPI offload properties iio: adc: ad4695: Add support for SPI offload doc: iio: ad4695: add SPI offload support .../devicetree/bindings/iio/adc/adi,ad4695.yaml | 16 +- .../bindings/spi/adi,axi-spi-engine.yaml | 24 ++ .../devicetree/bindings/spi/trigger-pwm.yaml | 39 ++ .../devicetree/bindings/spi/trigger-source.yaml | 28 ++ Documentation/iio/ad4695.rst | 68 ++++ Documentation/iio/ad7944.rst | 24 +- MAINTAINERS | 9 + drivers/iio/adc/Kconfig | 2 + drivers/iio/adc/ad4695.c | 438 +++++++++++++++++++- drivers/iio/adc/ad7944.c | 297 ++++++++++++-- drivers/iio/buffer/industrialio-buffer-dmaengine.c | 104 ++++- drivers/spi/Kconfig | 16 + drivers/spi/Makefile | 4 + drivers/spi/spi-axi-spi-engine.c | 314 +++++++++++++- drivers/spi/spi-offload-trigger-pwm.c | 162 ++++++++ drivers/spi/spi-offload.c | 452 +++++++++++++++++++++ drivers/spi/spi.c | 10 + include/dt-bindings/iio/adc/adi,ad4695.h | 7 + include/linux/iio/buffer-dmaengine.h | 5 + include/linux/spi/spi-offload.h | 164 ++++++++ include/linux/spi/spi.h | 21 + 21 files changed, 2132 insertions(+), 72 deletions(-) --- base-commit: 172b9942b1a943f2971b1b655f3907f2f568e95b change-id: 20240510-dlech-mainline-spi-engine-offload-2-afce3790b5ab prerequisite-change-id: 20241113-iio-adc-ad4695-move-dt-bindings-header-d6922ef7d134:v1 prerequisite-patch-id: 9dd88581d962cc5454c3577dc5ef59413db467b5 prerequisite-patch-id: d71deacf6bb4e90e8059a12a94ade36866729fa0 prerequisite-change-id: 20241111-tgamblin-ad4695_improvements-7a32a6268c26:v2 prerequisite-patch-id: 9752467c406cec438286e5c3efa7c0cddf8a9b3a prerequisite-patch-id: 7e6d36bfc262e562cb74d524e96db64694064326 prerequisite-patch-id: d864ef9f8a7303822d50d580a9ebbd8d304c8aa6 Best regards, -- David Lechner <dlechner@xxxxxxxxxxxx>
